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Michael A Mittelbrunn

from Boston, MA
Age ~71
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Also known as:
Michael R Mittelbrunn, Mike Mittelbrunn
Phone and address:
8 Garrison St APT 306, Boston, MA 02116
(617) 859-9810
Connected to:
Colleen E Mittelbrun, 63Dawn M Mittelbach, 61James G Mittel, 64John W Mittel, 90Jon E Mittelbronn, 45Michelle Mittelbrunn, 52Susan Mittelbrun, 60Theresa D Mittelbrun, 66Aizhan Mitteldorf, 48Kenneth J Mitteldorf, 62

Michael Mittelbrunn Phones & Addresses

  • 8 Garrison St APT 306, Boston, MA 02116 (617) 859-9810
  • 8 Garrison St, Boston, MA 02116
  • 129 Pembroke St, Boston, MA 02118
  • Roxbury, MA
  • Salem, MA
  • Danbury, CT
  • Trumbull, CT
  • Philadelphia, PA
  • Stratford, CT

Work

Company: Draper laboratory Jun 2007 Position: Realtime embedded software engineer

Education

Degree: Doctorates, Doctor of Philosophy School / High School: Drexel University Jan 1991 to Mar 1995 Specialities: Physics

Skills

Software Engineering • Embedded Software • Testing • C++ • Software Development • C • Software Design • Embedded Systems • Clearcase • Unix • Perl • Linux • Uml • Cvs • Matlab • Visual Basic • Digital Signal Processors • Device Drivers • Firmware • System Architecture • Algorithms • Systems Engineering • Debugging • Rtos • Physics

Industries

Computer Software

Resumes

Resumes

Michael Mittelbrunn Photo 1

Realtime Embedded Software Engineer

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Location:
Boston, MA
Industry:
Computer Software
Work:
Draper Laboratory
Realtime Embedded Software Engineer
Accurev Feb 2006 - Jan 2007
Senior Software Engineer
Teradyne Jun 1997 - Sep 2005
Software Development Engineer
Education:
Drexel University Jan 1991 - Mar 1995
Doctorates, Doctor of Philosophy, Physics Drexel University Sep 1988 - Dec 1990
Master of Science, Masters, Physics Drexel University Mar 1980 - Jun 1988
Bachelors, Bachelor of Science, Mathematics
Skills:
Software Engineering
Embedded Software
Testing
C++
Software Development
C
Software Design
Embedded Systems
Clearcase
Unix
Perl
Linux
Uml
Cvs
Matlab
Visual Basic
Digital Signal Processors
Device Drivers
Firmware
System Architecture
Algorithms
Systems Engineering
Debugging
Rtos
Physics

Publications

Us Patents

Low Jitter Phase-Locked Loop With Duty-Cycle Control

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US Patent:
6356129, Mar 12, 2002
Filed:
Oct 12, 1999
Appl. No.:
09/416578
Inventors:
David E. OBrien - Boston MA
Timothy W. Sheen - Brighton MA
Marc R. Hutner - Cambridge MA
Michael A. Mittelbrunn - Boston MA
Abdelkebir Sabil - Brighton MA
Assignee:
Teradyne, Inc. - Boston MA
International Classification:
H03K 3017
US Classification:
327175, 327156, 327294, 375376
Abstract:
A timing circuit for ATE generates an output clock from an input clock and controls output pulse width. The timing circuit includes a differential driver having an input that receives the input clock, and having inverting and non-inverting outputs. The inverting output is coupled to a first phase-locked loop, and the non-inverting output is coupled to a second phase-locked loop. The first and second phase-locked loops respectively generate first and second clocks in response to respective rising and falling edges of the input clock. A combiner circuit converts the first and second clocks into narrow pulse trains, and the pulse trains respectively operate SET and RESET inputs of a SET/RESET flip-flop. The SET/RESET flip-flop generates an output clock having rising edges responsive to rising edges of the input clock, and falling edges responsive to falling edges of the input clock. The timing circuit also includes a frequency divider in feedback path of the phase-locked loops, for establishing a frequency gain of the timing circuit.
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Michael A Mittelbrunn from Boston, MA, age ~71 Get Report