Search

Jeffrey Koze Phones & Addresses

  • 3595 Petran Ln, Hellertown, PA 18055 (610) 838-7063
  • Dunmore, PA
  • Bethlehem, PA
  • Whitehall, PA
  • Emmaus, PA
  • Northampton, PA
  • 3595 Petran Ln, Hellertown, PA 18055 (610) 334-9884

Work

Position: Machine Operators, Assemblers, and Inspectors Occupations

Education

Degree: High school graduate or higher

Interests

consulting offers, expertise requests, b...

Emails

Industries

Semiconductors

Resumes

Resumes

Jeffrey Koze Photo 1

Owner At Pk Gas Systems

View page
Location:
Allentown, Pennsylvania Area
Industry:
Semiconductors
Experience:
PK Gas Systems (Semiconductors industry): Owner,  (-) 

Business Records

Name / Title
Company / Classification
Phones & Addresses
Jeffrey Koze
Secretary
The New Jordan Lanes
Entertainment · Operates A 40 Lane Bowling Alley & Billiard Parlor
731 Jordan Pkwy, Whitehall, PA 18052
(610) 437-5701

Publications

Us Patents

Methods Of And Apparatus For Storing And Delivering A Fluid

View page
US Patent:
45833729, Apr 22, 1986
Filed:
Jan 30, 1985
Appl. No.:
6/696279
Inventors:
James J. Egan - Allentown PA
Jeffrey T. Koze - Whitehall PA
Henry Y. Kumagai - Allentown PA
Assignee:
AT&T Technologies, Inc. - Berkeley Heights NJ
International Classification:
F17C 702
US Classification:
62 53
Abstract:
A fluid (12), such as dichlorosilane, is stored in a pressure vessel (17) located at a site remote from a processing facility within the confines of a building (14). At such remote site the pressure vessel (17) is subject to climatic temperature variations over a range at the lower temperatures of which a vapor pressure of the fluid may be insufficient to generate a pressure within the pressure vessel to drive the fluid through a duct (36) toward the processing facility. A supply of an inert gas (34) is applied at a first predetermined pressure to the pressure vessel (17) to urge the fluid under such predetermined pressure through the duct (36) toward an evaporator vessel (38) located at the processing facility. The evaporator vessel (38) is maintained at a first predetermined elevated temperature at which the fluid at such first predetermined pressure is in a gaseous state. Any of the fluid urged toward and entering the evaporator vessel (38) is evaporated, such that a supply of the fluid in its gaseous state at the first predetermined pressure is maintained within the evaporator vessel (38).

Removal Of Substrate Perimeter Material

View page
US Patent:
54258464, Jun 20, 1995
Filed:
Aug 9, 1993
Appl. No.:
8/103726
Inventors:
Jeffrey T. Koze - Emmaus PA
Drew J. Kuhn - Whitehall PA
John D. LaBarre - Walnutport PA
Assignee:
AT&T Corp. - Murray Hill NJ
International Classification:
B44C 122
US Classification:
1566461
Abstract:
Perimeter material is removed from substrates by stacking the substrates and subjecting them to a plasma etch. In an exemplary application, the perimeter of a silicon wafer dielectric cap (typically silicon nitride) is removed by stacking the wafers in intimate contact, and etching the wafers in a barrel etcher. A well-controlled removal of the cap perimeter is obtained, allowing for a smooth epitaxial deposition at the water edge in a subsequent operation. An additional benefit is smoothing of the substrate edge contour, which reduces scratching of wafer cassettes and other handling equipment.

Integrated Circuits From Wafers Having Improved Flatness

View page
US Patent:
48744638, Oct 17, 1989
Filed:
Dec 23, 1988
Appl. No.:
7/290653
Inventors:
Jeffrey T. Koze - Whitehall PA
Anton J. Miller - Lehigh County PA
Assignee:
AT&T Bell Laboratories - Murray Hill NY
International Classification:
H01L 21306
B44C 122
C03C 1500
C03C 2506
US Classification:
156645
Abstract:
An improvement in silicon wafer flatness is obtained by reducing the time spent in polishing the wafer. After a conventional lapping operation, the wafer is coated with an etch resistant coating, typically silicon nitride. A polishing step removes the nitride coating on the flat surfaces of the wafer, but leaves a nitride coating on the sides of pits that are formed in the lapping operation. The wafer is then etched, typically in KOH, to remove the silicon surface to below the depth of the pits. The undercutting of the nitride coating removes the pits, or leaves relatively small protrusions in their place. The protrusions may be removed by a short polishing operation. Other wafer types and etch-resistant materials are possible. Integrated circuits are typically formed on the wafers by lithography techniques that advantageously utilize the improved flatness.

Back Sealing Of Silicon Wafers

View page
US Patent:
46876820, Aug 18, 1987
Filed:
May 2, 1986
Appl. No.:
6/858688
Inventors:
Jeffrey T. Koze - Whitehall PA
Assignee:
American Telephone and Telegraph Company, AT&T Technologies, Inc. - Berkeley Heights NJ
International Classification:
H01L 21318
US Classification:
437238
Abstract:
Sealing the backside of a semiconductor wafer prevents evaporation of the dopant (typically boron) when an epitaxial layer is grown on the front (active) side, thereby preventing autodoping of the epitaxial layer with excess dopant. The present technique deposits an oxide layer during the ramp-up of the furnace that also deposits the nitride cap, thereby avoiding an extra process step. It also avoids the higher temperatures required for the prior-art technique of growing the oxide layer, resulting in lower oxygen precipitation due to the capping process and a greater yield of usable wafers.
Jeffrey T Koze from Hellertown, PA, age ~63 Get Report