Don W. Zobel - Tempe AZ W. Eric Main - Mesa AZ W. David Pace - Tempe AZ Dennis L. Welty - Mesa AZ
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H04B 158
US Classification:
179170NC
Abstract:
A balanced multiplier circuit for a subscriber loop interface circuit (SLIC) which provides both loop current to a two-wire bidirectional subscriber loop and suppression of longitudinal signals generated at the two-wire loop input to the SLIC while maintaining the midpoint load voltage at half the available power supply voltage applied to the SLIC.
Fail Safe Circuit For An Anti-Skid Control Apparatus
Fail safe circuitry of an anti-skid control apparatus for a brake system of a motor vehicle. The fail safe circuitry is rendered in a monolithic integrated circuit chip and includes apparatus for sensing the power consumed by said chip and apparatus for decoupling said chip from the power source for preventing its thermal destruction when the power consumed reaches a predetermined level. The chip also includes apparatus for precisely timing the time duration of a brake release provided by the anti-skid control apparatus and generating a latch signal to disable said anti-skid control apparatus to limit the brake release duration within a predetermined time duration.
A cardiac pacemaker pulse generator utilizing digital circuitry for controlling the provision of cardiac stimulating pulses. The width of the pulses is increased as the battery voltage decreases to maintain the energy of the stimulation pulse. The pulse width of each pacemaker pulse is determined by comparing a reference signal to an incrementally increasing signal which is related to the battery voltage.
Bias Circuit Which Is Independent Of Output Device Voltage Characteristics For Biasing An Amplifier In Class Ab Operation
W. Eric Main - Mesa AZ Dennis L. Welty - Mesa AZ Don W. Zobel - Tempe AZ
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H03F 330
US Classification:
330265
Abstract:
A Class AB amplifier circuit includes bias circuitry for biasing the output transistor into partial conduction independent of the base-to-emitter voltage of the transistor. The bias circuitry is a simple circuit loop including the output transistor and forms the remainder of the amplifier circuit which can be fabricated in monolithic integrated circuit form. The loop comprises a differential amplifier for providing a substantially constant offset voltage across a pair of terminals between which is connected a current biasing component. The current biasing component is connected in series with the output transistor to produce a small quiescent current to flow therethrough, the value of which is independent of the transistor's characteristics.
A charge pump circuit (10) has been provided for maintaining the currents sunk by each of the bottom current sources (12, 14) substantially equal to the current sourced from a first upper current source (16). The present invention maintains the voltage across a second upper current source (64) that determines the current for the lower current sources to be modified with respect to corresponding changes in the first upper current source wherein these changes in the first upper current source are due to a varying voltage occurring at the output (18) of the charge pump circuit.
Geoffrey W. Perkins - Chandler AZ Don W. Zobel - Miami AZ Tony Takeshian - Chandler AZ
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H03K 301 H03K 19091
US Classification:
3072961
Abstract:
A negative feedback loop, including a two collector I. sup. 2 L gate having one collector returned to the input of the gate and forcing a reference current into the other of the two collectors of the gate, is used to match the current at the collector of the injector of the gate to the reference current. The feedback loop further includes a current source for sourcing the reference current and a pair of cascoded emitter follower transistors coupled between the current source and the injector input of the gate such that the feedback loop will regulate the current through the injector to be equal to the reference current. The injector input of the gate of the feedback loop can be coupled to the injector inputs of similar I. sup. 2 L gates to be biased therefrom such that the injector currents are well controlled.
Threshold Circuit Suitable For Use In Electronic Ignition Systems
Robert B. Jarrett - Tempe AZ Don W. Zobel - Tempe AZ
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
F02P 900
US Classification:
123148E
Abstract:
A variable dwell ignition system comprising a circuit responsive to changes in engine RPM for causing the dwell time of the ignition system to be varied accordingly. The circuit is adapted to be connected to a sensor coil to receive ignition timing signals developed thereacross which are generated in timed relationship to the engine operation. The circuit provides for changing the direct current (DC) level about which the ignition signals are generated such that a threshold level is varied. As the threshold level is varied the dwell time of the system is varied respectively.
A circuit for limiting the magnitude of current sourced from a first load circuit to a second load circuit to a predetermined value. The circuit includes a current sourcing circuit for sourcing current from the first load circuit to the second and a feedback circuit which is responsive to the magnitude of the current sourced to the second load circuit reaching the predetermined value for supplying any additional current that the second load circuit may require while inhibiting additional current from being sourced from the first load circuit.