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Xuanyao Fong

from Lafayette, IN
Age ~42
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Also known as:
Fong Xuanyao
Connected to:
Aaron C Fong, 51Adeline Fong, 58Angela K Fong, 43Bill N Fong, 73Calvin C Fong, 70Cedric Fong, 71Chang Fong, 71Charlie M Fong, 124Choi M Fong, 74Christian B Fong, 31

Xuanyao Fong Phones & Addresses

  • Lafayette, IN
  • W Lafayette, IN
  • 2714 Chilton Dr, Lafayette, IN 47909

Work

Company: Purdue university Aug 2006 Address: West Lafayette, Indiana Position: Graduate research assistant

Education

Degree: Ph.D. School / High School: Purdue University 2006 to 2013 Specialities: Electrical Engineering

Skills

Electrical Engineering • EDA • IC • Circuit Design • Matlab • Simulation • Nanotechnology • VLSI • Perl • Verilog • VHDL • ASIC • Digital Design • Memory Design • Circuit Simulation • Digital Electronics • Electronic Circuit Design • Simulations • Micromagnetics • C/C++ • CUDA • Object-Oriented MicroMagnetic Framework ... • Multi-GPU MicroMagnetics (MuMax2)

Languages

English • Chinese

Ranks

Course: B.Sc., Electrical Engineering Organization: Purdue University Description: VIP (EE495V)

Industries

Research

Resumes

Resumes

Xuanyao Fong Photo 1

Ph.d. Candidate At Purdue University

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Position:
Graduate Research Assistant at Purdue University
Location:
Lafayette, Indiana Area
Industry:
Research
Work:
Purdue University - West Lafayette, Indiana since Aug 2006
Graduate Research Assistant
Advanced Micro Devices, Inc. Jan 2007 - Aug 2007
Intern Engineer
Purdue University - West Lafayette, Indiana Aug 2006 - Dec 2006
Graduate Teaching Assistant
Education:
Purdue University 2006 - 2013
Ph.D., Electrical Engineering Purdue University 2003 - 2006
B.Sc., Electrical Engineering
Skills:
Electrical Engineering
EDA
IC
Circuit Design
Matlab
Simulation
Nanotechnology
VLSI
Perl
Verilog
VHDL
ASIC
Digital Design
Memory Design
Circuit Simulation
Digital Electronics
Electronic Circuit Design
Simulations
Micromagnetics
C/C++
CUDA
Object-Oriented MicroMagnetic Framework (OOMMF)
Multi-GPU MicroMagnetics (MuMax2)
Languages:
English
Chinese

Publications

Us Patents

Electronic Memory Including Rom And Ram

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US Patent:
20150371695, Dec 24, 2015
Filed:
May 27, 2015
Appl. No.:
14/723450
Inventors:
- West Lafayette IN, US
Dongsoo Lee - White Plains NY, US
Xuanyao Fong - Lafayette IN, US
Assignee:
Purdue Research Foundation - West Lafayette IN
International Classification:
G11C 11/16
Abstract:
An electronic data-storage apparatus having ROM embedded in an STT-MRAM. The apparatus comprises at least two bit lines, a plurality of bit cells, each including, connected to a source line (SL), a series connection (in any order) of a selection element (e.g., transistor gated by word line WL), a resistive storage element (e.g., MTJ), and a permanent connection to one of the bit lines (e.g., BL, BL). The apparatus may also include a ROM sense amplifier which is configured to precharge two output nodes connected to respective ones of the bit lines, so that the jumper in a selected memory cell pulls one of the output nodes to a first reference potential (e.g., GND) and the ROM sense amplifier pulls the other of the output nodes to a second reference potential (e.g., Vdd).
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Xuanyao Fong from Lafayette, IN, age ~42 Get Report