Volodymyr M Muratov

6621256, Sep 16, 2003

Mar 7, 2002

10/093197

Volodymyr A. Muratov - Durham NC
Robert G. Hodgins - Durham NC
Thomas A. Jochum - Durham NC

Intersil Corporation - Palm Bay FL

G05F 140

323282, 323283

A DC-to-DC converter has a pulse width modulator PWM) and a hysteretic (ripple) modulator. For low current loads, the hysteretic modulator is selected; for high current loads, the PWM is selected. A mode selection switch senses the polarity of the switched output voltage at the end of each switching cycle. If the polarity changes from one cycle to the next, the mode may be instantly changed to the other mode. Counters are used to record the polarity at the end of each cycle and switching from one mode to another can be delayed by the counters to prevent changing modes based on spurious output voltage fluctuations.

6680604, Jan 20, 2004

Feb 22, 2001

09/791509

Volodymyr A. Muratov - Durham NC
Michael Coletta - Lake Forest CA
Wlodzimerz S. Wiktor - Raleigh NC

Intersil Corporation - Palm Bay FL

G05F 156

323285, 323283

A DC/DC converter has a DAC that receives a code associated with desired processor operating voltage and sets the reference voltage on its output. The reference voltage (V ) is boosted by the buffer amplifier to center the droop along the median load. A sensed current signal I is proportional to the load current I and can be either inductor current, or switch current, or diode (or synchronous switch) current. In all cases it is scaled down by the factor of gain G. A droop control feedback circuit includes an error amplifier. It has two inputs. In one embodiment the gain of the converter is by a signal inversely proportional to the processor clock frequency F and transformed to the current I that creates the voltage drop across the resistor R. The other input is coupled to the buffer amplifier output. As a result, the output voltage of the converter is inversely proportionally to the load current and is invariant to the processor clock frequency changes associated with the processor mode switchover.

6919715, Jul 19, 2005

Sep 23, 2003

10/668752

Volodymyr A. Muratov - Durham NC, US
Michael Coletta - Lake Forest CA, US
Wlodzimerz S. Wiktor - Raleigh NC, US

Intersil Corporation - Palm Bay FL

G05F001/56

323285, 232283

A DC/DC converter has a DAC that receives a code associated with desired processor operating voltage and sets the reference voltage on its output. The reference voltage (V) is boosted by the buffer amplifier to center the droop along the median load. A sensed current signal Iis proportional to the load current Iand can be either inductor current, or switch current, or diode (or synchronous switch) current. In all cases it is scaled down by the factor of gain G. A droop control feedback circuit includes an error amplifier. It has two inputs. In one embodiment the gain of the converter is by a signal inversely proportional to the processor clock frequency Fand transformed to the current Ithat creates the voltage drop across the resistor R. The other input is coupled to the buffer amplifier output. As a result, the output voltage of the converter is inversely proportionally to the load current and is invariant to the processor clock frequency changes associated with the processor mode switchover.

20010035745, Nov 1, 2001

May 1, 2001

09/846721

Volodymyr Muratov - Durham NC, US
Robert Hodgins - Durham NC, US
Thomas Jochum - Durham NC, US

G05F001/40

323/283000

A DC-to-DC converter has a pulse width modulator PWM) and a hysteretic (ripple) modulator. For low current loads, the hysteretic modulator is selected; for high current loads, the PWM is selected. A mode selection switch senses the polarity of the switched output voltage at the end of each switching cycle. If the polarity changes from one cycle to the next, the mode may be instantly changed to the other mode. Counters are used to record the polarity at the end of each cycle and switching from one mode to another can be delayed by the counters to prevent changing modes based on spurious output voltage fluctuations.

20020194516, Dec 19, 2002

Sep 10, 2001

09/950469

Volodymyr Muratov - Durham NC, US
Robert Hodgins - Durham NC, US

G06F001/26

713/320000

An electronic system controls power to its central processing unit with digital voltage identification (VID) codes and analog set signals. The VID codes are converted into an analog VID signal by digital to analog converter An analog set voltage generated by a sense network sets the voltage level when the CPU operates at any voltage less than its maximum. Comparator and switch select either the analog VID voltage or the analog set voltage.