Search

Vivek P Telang

from Austin, TX
Age ~62

Vivek Telang Phones & Addresses

  • 6708 Quincy Cv, Austin, TX 78739 (512) 301-8580
  • 7120 Wandering Oak Rd, Austin, TX 78749 (512) 301-8580
  • Dripping Springs, TX
  • South Bend, IN
  • Mishawaka, IN

Work

Company: Broadcom Sep 2004 Position: Vice president, engineering

Education

Degree: Doctorates, Doctor of Philosophy School / High School: University of Notre Dame 1983 to 1991

Skills

Asic • Semiconductors • Soc • Ic • Embedded Systems • Verilog • Mixed Signal • Engineering • Rtl Design • Eda

Industries

Computer Hardware

Resumes

Resumes

Vivek Telang Photo 1

Vice President, Engineering

View page
Location:
Austin, TX
Industry:
Computer Hardware
Work:
Broadcom
Vice President, Engineering

Vitesse Semiconductor Jul 1999 - Sep 2004
Design Manager

Cirrus Logic Sep 1995 - Jul 1999
Project Manager

Tellabs Mar 1985 - Sep 1995
Research Engineer
Education:
University of Notre Dame 1983 - 1991
Doctorates, Doctor of Philosophy
Indian Institute of Technology, Bombay 1978 - 1983
Bachelors, Bachelor of Technology
Skills:
Asic
Semiconductors
Soc
Ic
Embedded Systems
Verilog
Mixed Signal
Engineering
Rtl Design
Eda

Publications

Us Patents

Gain Control For Interleaved Analog-To-Digital Conversion For Electronic Dispersion Compensation

View page
US Patent:
7525462, Apr 28, 2009
Filed:
Aug 27, 2007
Appl. No.:
11/845762
Inventors:
Vasudevan Parthasarthy - Irvine CA, US
Sudeep Bhoja - San Jose CA, US
Vivek Telang - Austin TX, US
Afshin Momtaz - Laguna Hills CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H03M 1/00
US Classification:
341139, 341155, 375233, 375293
Abstract:
Embodiments include a system for performing dispersion compensation on an electromagnetic signal received over a communication channel, the electromagnetic signal bearing information at a symbol rate. An interleaved analog to digital converter (“ADC”) block may be used, wherein the interleaved ADC block may be configured to generate a plurality of digitally sampled signals from the electromagnetic signal. An interleaved equalizer block may be configured to digitally process each of the digitally sampled signals generated by the ADC block to generate a plurality of digitally equalized signals. A multiplexer may be configured to aggregate the digitally equalized signals into a composite output signal.

Phase Control For Interleaved Analog-To-Digital Conversion For Electronic Dispersion Compensation

View page
US Patent:
7525470, Apr 28, 2009
Filed:
Aug 27, 2007
Appl. No.:
11/845765
Inventors:
Vasudevan Parthasarthy - Irvine CA, US
Sudeep Bhoja - San Jose CA, US
Vivek Telang - Austin TX, US
Afshin Momtaz - Laguna Hills CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H03M 1/12
US Classification:
341156, 341118, 341120, 341145, 341155
Abstract:
Embodiments include a system for performing dispersion compensation on an electromagnetic signal received over a communication channel, the electromagnetic signal bearing information at a symbol rate. An interleaved analog to digital converter (“ADC”) block may be used, wherein the interleaved ADC block may be configured to generate a plurality of digitally sampled signals from the electromagnetic signal. An interleaved equalizer block may be configured to digitally process each of the digitally sampled signals generated by the ADC block to generate a plurality of digitally equalized signals. A multiplexer may be configured to aggregate the digitally equalized signals into a composite output signal.

Electronic Dispersion Compensation Utilizing Interleaved Architecture And Channel Identification For Assisting Timing Recovery

View page
US Patent:
7830987, Nov 9, 2010
Filed:
Aug 10, 2007
Appl. No.:
11/837301
Inventors:
Sudeep Bhoja - Irvine CA, US
Vasudevan Parthasarathy - Irvine CA, US
Vivek Telang - Austin TX, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H04L 27/14
US Classification:
375326
Abstract:
Embodiments include a system for performing electronic dispersion compensation on an information-bearing signal transmitted over a communication channel. The system may include a channel identification module configured to receive a first digitized version of the information bearing signal and an equalized version of the information-bearing signal, and may be configured to determine an impulse response of the communication channel based thereon. The system may include a time varying phase detector configured to receive the equalized version of the information bearing signal, a second digitized version of the information-bearing signal, and the impulse response, and may be further configured to generate a reference wave based on the impulse response and the equalized version of the information-bearing signal. The time varying phase detector may be configured to generate a phase signal based on the reference wave and on an error signal determined from the reference wave and the second digitized version of the information-bearing signal.

Electronic Dispersion Compensation Utilizing Interleaved Architecture And Channel Identification For Assisting Timing Recovery

View page
US Patent:
7961781, Jun 14, 2011
Filed:
Aug 10, 2007
Appl. No.:
11/837278
Inventors:
Vivek Telang - Austin TX, US
Vasudevan Parthasarathy - Irvine CA, US
Sudeep Bhoja - San Jose CA, US
Hong Chen - Irvine CA, US
Afshin Momtaz - Laguna Hills CA, US
Ali Ghiasi - Cupertino CA, US
Michael Furlong - Santa Margarita CA, US
Lorenzo Longo - Laguna Beach CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H03H 7/30
US Classification:
375229, 375355
Abstract:
Embodiments include a system for performing dispersion compensation on an electromagnetic signal received over a communication channel, the electromagnetic signal bearing information at a symbol rate. An interleaved analog to digital converter (“ADC”) block may be used, wherein the interleaved ADC block may be configured to generate a plurality of digitally sampled signals from the electromagnetic signal. An interleaved equalizer block may be configured to digitally process each of the digitally sampled signals generated by the ADC block to generate a plurality of digitally equalized signals. A multiplexer may be configured to aggregate the digitally equalized signals into a composite output signal.

Multi-Rate Backplane Transceiver

View page
US Patent:
8130786, Mar 6, 2012
Filed:
Apr 30, 2008
Appl. No.:
12/112785
Inventors:
Michael Furlong - Rancho Santa Margarita CA, US
Vivek Telang - Austin TX, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H04L 12/56
US Classification:
370463
Abstract:
An apparatus is disclosed that includes first transceiver circuitry adapted for transmitting and receiving Ethernet data over a network using a first Ethernet communication protocol at a first data rate, second transceiver circuitry adapted for transmitting and receiving Ethernet data over a network using a second Ethernet communication protocol at a second data rate; and third transceiver circuitry adapted for transmitting and receiving Ethernet data over a network using a third Ethernet communication protocol at a third data rate.

Adaptive Offset Adjustment Algorithm

View page
US Patent:
8369453, Feb 5, 2013
Filed:
Dec 3, 2008
Appl. No.:
12/314051
Inventors:
Namik Kemal Kocaman - San Clemente CA, US
Afshin Momtaz - Laguna Hills CA, US
Velu Chellam Pillai - Austin TX, US
Vivek Telang - Austin TX, US
Sundararajan Chidambara - Austin TX, US
Magesh Valliappan - Austin TX, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H03K 9/00
US Classification:
375316, 375219, 375295, 375297, 375345, 330278, 330295, 455234, 455253
Abstract:
An apparatus and method is disclosed to compensate for one or more offsets in a communications signal. A communications receiver may carry out an offset adjustment algorithm to compensate for the one or more offsets. An initial search procedure determines one or more signal metric maps for one or more selected offset adjustment corrections from the one or more offset adjustment corrections. The offset adjustment algorithm determines one or more optimal points for one or more selected offset adjustment correction based upon the one or more signal maps. The adaptive offset algorithm adjusts each of the one or more selected offset adjustment corrections to their respective optimal points and/or each of one or more non-selected offset adjustment corrections to a corresponding one of a plurality of possible offset corrections to provide one or more adjusted offset adjustment corrections. A tracking mode procedure optimizes the one or more adjusted offset adjustment corrections.

Crosstalk Emission Management

View page
US Patent:
8428111, Apr 23, 2013
Filed:
May 1, 2007
Appl. No.:
11/799368
Inventors:
Magesh Valliappan - Austin TX, US
Howard Baumer - Laguna Hills CA, US
Anthony Brewster - Laguna Niguel CA, US
Vivek Telang - Austin TX, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H03H 7/30
H03K 5/159
US Classification:
375232, 375231, 375233, 375234
Abstract:
Various embodiments are disclosed relating to crosstalk emission management. In an example embodiment, an amplitude of a main tap of a transmit equalizer may be determined to limit crosstalk emitted from a local channel to one or more other channels to be less than a threshold. A ratio of an amplitude of at least one secondary tap of the transmit equalizer to the amplitude of the main tap may be determined to provide equalization to the local channel.

Multi-Protocol Communications Receiver With Shared Analog Front-End

View page
US Patent:
8442159, May 14, 2013
Filed:
Sep 16, 2010
Appl. No.:
12/883842
Inventors:
Vivek Telang - Austin TX, US
Hong Chen - Irvine CA, US
Vasudevan Parthasarathy - Irvine CA, US
Jun Cao - Irvine CA, US
Afshin Momtaz - Laguna Hills CA, US
Ali Ghiasi - Cupertino CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H04L 27/06
H03D 1/00
US Classification:
375340, 375316, 375345, 375259, 375257, 375219
Abstract:
According to an example embodiment, a communications receiver may include a variable gain amplifier (VGA) configured to amplify received signals, a VGA controller configured to control the VGA, a plurality of analog to digital converter (ADC) circuits coupled to an output of the VGA, wherein the plurality of ADC circuits are operational when the communications receiver is configured to process signals of a first communications protocol, and wherein only a subset of the ADC circuits are operational when the communications receiver is configured to process signals of a second communications protocol.
Vivek P Telang from Austin, TX, age ~62 Get Report