Resumes
Resumes
Pch Validation Architect
View pageLocation:
Sacramento, CA
Industry:
Computer Hardware
Work:
Intel Corporation
Pch Validation Architect
Pch Validation Architect
Education:
South Dakota School of Mines and Technology 1997 - 1999
Master of Science, Masters, Computer Engineering Gandhi Institute of Technology & Management (Gitam) University, Visakhapatnam 1993 - 1997
Bachelor of Engineering, Bachelors, Electronics Engineering
Master of Science, Masters, Computer Engineering Gandhi Institute of Technology & Management (Gitam) University, Visakhapatnam 1993 - 1997
Bachelor of Engineering, Bachelors, Electronics Engineering
Skills:
Pcie
Debugging
Processors
Computer Architecture
Soc
Microprocessors
Logic Design
Systemverilog
Rtl Design
Intel
Verilog
Asic
System on A Chip
Dft
Vlsi
Low Power Design
Application Specific Integrated Circuits
Microarchitecture
Hardware Architecture
Vhdl
Silicon Validation
Perl
Static Timing Analysis
Eda
Tcl
Rtl Coding
Field Programmable Gate Arrays
Specman
Fpga
Logic Analyzer
Usb
Emulation
Information Security
Team Leadership
Management
Debugging
Processors
Computer Architecture
Soc
Microprocessors
Logic Design
Systemverilog
Rtl Design
Intel
Verilog
Asic
System on A Chip
Dft
Vlsi
Low Power Design
Application Specific Integrated Circuits
Microarchitecture
Hardware Architecture
Vhdl
Silicon Validation
Perl
Static Timing Analysis
Eda
Tcl
Rtl Coding
Field Programmable Gate Arrays
Specman
Fpga
Logic Analyzer
Usb
Emulation
Information Security
Team Leadership
Management