Search

Vanessa Smet Phones & Addresses

  • Atlanta, GA

Work

Company: 3d systems packaging research center @ gt May 2014 Position: Research engineer ii - interconnections and assembly program manager - 3d systems packaging research center, georgia technician

Education

Degree: Doctorates, Doctor of Philosophy School / High School: Université Monptellier 2 2007 to 2010 Specialities: Electronics

Skills

R&D • Electrical Engineering • Scanning Electron Microscopy • Power Electronics • Modeling • Finite Element Analysis • Thin Films • Reliability Test • Packaging • Bga • Mechanical Engineering • Mechanics of Materials • Physics • Materials Science • English • Applied Physics • Thermomechanics

Interests

Reliability of Electronic Systems • Thermo Mechanical Modeling • Mechanics of Micro Scale Materials • Finite Element Analysis • Power Electronics • Μbga • Multi Physics Problems • High Temperature Die Attachment • Lead Free Solders • Power and Thermal Cycling • 3D Packaging Technologies • Power Integration • Failure Analysis • Mechanical Engineering

Industries

Research

Resumes

Resumes

Vanessa Smet Photo 1

Assistant Professor

View page
Location:
Atlanta, GA
Industry:
Research
Work:
3D Systems Packaging Research Center @ Gt
Research Engineer Ii - Interconnections and Assembly Program Manager - 3D Systems Packaging Research Center, Georgia Technician

3D Systems Packaging Research Center @ Gt Nov 2012 - May 2014
Research Scientist - Interconnections

Tyndall National Institute Dec 2010 - Nov 2012
Post-Doctoral Researcher

Ies - Institut D'electronique Et Des Systèmes Sep 2007 - Nov 2010
Ph.d Student

Université Montpellier 2 Sep 2007 - Nov 2010
Teaching Assistant
Education:
Université Monptellier 2 2007 - 2010
Doctorates, Doctor of Philosophy, Electronics
Université Montpellier 2 2006 - 2007
Master of Science, Masters, Electronics Engineering
Paris - Sud University (Paris Xi) 2004 - 2005
Master of Science, Masters, Applied Physics, Information Systems
Paris - Sud University (Paris Xi) 2003 - 2004
Bachelors, Bachelor of Science, Applied Physics
Lycée Faidherbe, Lille 2001 - 2003
Lycée Sacré Coeur, Tourcoing 2000 - 2001
Skills:
R&D
Electrical Engineering
Scanning Electron Microscopy
Power Electronics
Modeling
Finite Element Analysis
Thin Films
Reliability Test
Packaging
Bga
Mechanical Engineering
Mechanics of Materials
Physics
Materials Science
English
Applied Physics
Thermomechanics
Interests:
Reliability of Electronic Systems
Thermo Mechanical Modeling
Mechanics of Micro Scale Materials
Finite Element Analysis
Power Electronics
Μbga
Multi Physics Problems
High Temperature Die Attachment
Lead Free Solders
Power and Thermal Cycling
3D Packaging Technologies
Power Integration
Failure Analysis
Mechanical Engineering

Publications

Us Patents

Interconnect Assemblies And Methods Of Making And Using Same

View page
US Patent:
20140145328, May 29, 2014
Filed:
Jan 21, 2014
Appl. No.:
14/160136
Inventors:
- Atlanta GA, US
Venkatesh Sundaram - Alpharetta GA, US
Markondeya Raj Pulugurtha - Tucker GA, US
Tao Wang - Atlanta GA, US
Vanessa Smet - Atlanta GA, US
Assignee:
Georgia Tech Research Corporation - Atlanta GA
International Classification:
H01L 23/00
US Classification:
257737, 438613
Abstract:
The various embodiments of the present invention provide fine pitch, chip-to-substrate hybrid interconnect assemblies, as well as methods of making and using the assemblies. The hybrid assemblies generally include a semiconductor having a die pad disposed thereon, a substrate having a substrate pad disposed thereon, and a polymer layer disposed between the surface of the die pad and the surface of the substrate pad. In addition, at least a portion of the surface of the die pad is metallically bonded to at least a portion of the surface of the substrate pad and at least a portion of the surface of the die pad is chemically bonded to at least a portion of the surface of the substrate pad.
Vanessa Smet from Atlanta, GA, age ~40 Get Report