Vage Oganesian

7495341, Feb 24, 2009

Jan 30, 2007

11/699852

Gil Zilber - Ramat Gan, IL
Julia Aksenton - Jerusalem, IL
Vage Oganesian - Palo Alto CA, US

Tessera Technologies Hungary Kft.

H01L 23/48
H01L 23/52
H01L 29/40

257778, 257779, 257693, 257E23061, 257E2307

An integrally packaged integrated circuit device including an integrated circuit die including a crystalline substrate having first and second generally planar surfaces and edge surfaces and semiconductor circuitry formed over the first generally planar surface, at least one chip scale packaging layer formed over the semiconductor circuitry and the first generally planar surface, an insulation layer formed over the second generally planar surface and the edge surfaces and at least one electrical conductor formed directly on the insulation layer overlying the second generally planar surface, the at least one electrical conductor being connected to the circuitry by at least one pad formed directly on the first generally planar surface.

7642629, Jan 5, 2010

Aug 13, 2007

11/891867

Gil Zilber - Ramat Gan, IL
Reuven Katraro - Rishon le Zion, IL
Julia Aksenton - Jerusalem, IL
Vage Oganesian - Palo Alto CA, US

Tessera Technologies Hungary Kft.

H01L 23/02
H01L 21/44

257678, 257684, 257690, 257E21499, 438106, 438107

An integrally packaged integrated circuit device including an integrated circuit die including a crystalline substrate having first and second generally planar surfaces and edge surfaces and an active surface formed on the first generally planar surface, at least one chip scale packaging layer formed over the active surface and at least one electrical contact formed over the at least one chip scale packaging layer, the at least one electrical contact being connected to circuitry on the active surface by at least one pad formed on the first generally planar surface.

7749886, Jul 6, 2010

Dec 20, 2006

11/643021

Vage Oganesian - Palo Alto CA, US
Guilian Gao - San Jose CA, US
Belgacem Haba - Saratoga CA, US
David Ovrutsky - Ashkelon, IL

Tessera, Inc. - San Jose CA

H01L 21/44

438612, 438613, 257737, 257E21508

A method of making a microelectronic assembly includes providing a semiconductor wafer having contacts accessible at a first surface, forming compliant bumps over the first surface and depositing a sacrificial layer over the compliant bumps. The method includes grinding the sacrificial layer and the compliant bumps so as to planarize top surfaces of the compliant bumps, whereby the planarized top surfaces are accessible through said sacrificial layer. The sacrificial layer is removed to expose the compliant bumps and the contacts. A silicone layer is deposited over the compliant bumps and portions of the silicone layer are removed to expose the contacts accessible at the first surface of the semiconductor wafer. Conductive traces are formed having first ends electrically connected with the contacts and second ends overlying the compliant bumps and conductive elements are provided atop the second ends of the traces.

7791199, Sep 7, 2010

Nov 22, 2006

11/604020

Andrey Grinman - Jerusalem, IL
David Ovrutsky - Jerusalem, IL
Charles Rosenstein - Ramat Beit Shemesh, IL
Belgacem Haba - Saratoga CA, US
Vage Oganesian - Palo Alto CA, US

Tessera, Inc. - San Jose CA

H01L 23/48

257747

A chip-sized wafer level packaged device including a portion of a semiconductor wafer including a device, a packaging layer formed over the portion of the semiconductor wafer, the packaging layer including a material having thermal expansion characteristics similar to those of the semiconductor wafer and a ball grid array formed over a surface of the packaging layer and being electrically connected to the device.

7807508, Oct 5, 2010

Apr 25, 2007

11/789694

Vage Oganesian - Palo Alto CA, US
Andrey Grinman - Jerusalem, IL
Charles Rosenstein - Ramat Beit Shemesh, IL
Felix Hazanovich - Jerusalem, IL
David Ovrutsky - Ashkelon, IL
Avi Dayan - Jerusalem, IL
Yulia Aksenton - Jerusalem, IL
Ilya Hecht - Beit Shemesh, IL

Tessera Technologies Hungary Kft.

H01L 21/00

438114, 438106, 438121, 438122, 438124, 257693, 257 37, 257E21502, 257E2301

A method is provided for fabricating a unit including a semiconductor element such as a sensor unit, e. g. , for optical imaging. A semiconductor element has plurality of conductive features exposed at the front surface and semiconductive or conductive material exposed at at least one of the front and rear surfaces. At least some of the conductive features are insulated from the exposed semiconductive or conductive material. By electrodeposition, an insulative layer is formed to overlie the at least one of exposed semiconductive material or conductive material. Subsequently, a plurality of conductive contacts and a plurality of conductive traces are formed overlying the electrodeposited insulative layer, the conductive traces connecting the conductive features to the conductive contacts on the rear surface. The unit can be incorporated in a camera module having an optical element in registration with an imaging area of the semiconductor element.

7829438, Nov 9, 2010

Apr 13, 2007

11/787209

Belgacem Haba - Saratoga CA, US
Vage Oganesian - Palo Alto CA, US

Tessera, Inc. - San Jose CA

H01L 21/00

438462, 438109, 257E23179

In accordance with an aspect of the invention, a stacked microelectronic package is provided which may include a plurality of subassemblies, e. g. , a first subassembly and a second subassembly underlying the first subassembly. A front face of the second subassembly may confront the rear face of the first subassembly. Each of the first and second subassemblies may include a plurality of front contacts exposed at the front face, at least one edge and a plurality of front traces extending about the respective at least one edge. The second subassembly may have a plurality of rear contacts exposed at the rear face. The second subassembly may also have a plurality of rear traces extending from the rear contacts about the at least one edge. The rear traces may extend to at least some of the plurality of front contacts of at least one of the first or second subassemblies.

7901989, Mar 8, 2011

Jun 20, 2008

12/143743

Belgacem Haba - Saratoga CA, US
Ilyas Mohammed - Santa Clara CA, US
Vage Oganesian - Palo Alto CA, US
David Ovrutsky - Charlotte NC, US
Laura Wills Mirkarimi - Sunol CA, US

Tessera, Inc. - San Jose CA

H01L 21/00

438110, 257E23178

A stacked microelectronic assembly is fabricated from a structure which includes a plurality of first microelectronic elements having front faces bonded to a carrier. Each first microelectronic element may have a first edge and a plurality of first traces extending along the front face towards the first edge. After exposing at least a portion of the first traces, a dielectric layer is formed over the plurality of first microelectronic elements. After thinning the dielectric layer, a plurality of second microelectronic elements are aligned and joined with the structure such that front faces of the second microelectronic elements are facing the rear faces of the plurality of first microelectronic elements. Processing is repeated to form the desirable number of layers of microelectronic elements. In one embodiment, the stacked layers of microelectronic elements may be notched at dicing lines to expose edges of traces, which may then be electrically connected to leads formed in the notches.

7935568, May 3, 2011

Oct 31, 2006

11/590616

Vage Oganesian - Palo Alto CA, US
David Ovrutsky - Ashkelon, IL
Charles Rosenstein - Ramat Beit Shemesh, IL
Belgacem Haba - Saratoga CA, US
Giles Humpston - Aylesbury, GB

Tessera Technologies Ireland Limited

H01L 21/44
H01L 21/48
H01L 21/50

438106, 438113, 438612

A method is provided for fabricating a unit including a semiconductor element such as a sensor unit, e. g. , for optical imaging. A semiconductor element has plurality of conductive features exposed at the front surface and semiconductive or conductive material exposed at least one of the front and rear surfaces. At least some of the conductive features are insulated from the exposed semiconductive or conductive material. By electrodeposition, an insulative layer is formed to overlie the at least one of exposed semiconductive material or conductive material. Subsequently, a plurality of conductive contacts and a plurality of conductive traces are formed overlying the electrodeposited insulative layer, the conductive traces connecting the conductive features to the conductive contacts. The unit can be incorporated in a camera module having an optical element in registration with an imaging area of the semiconductor element.