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Thomas George Madaelil

from Austin, TX
Age ~43

Thomas Madaelil Phones & Addresses

  • 8128 Forest Heights Ln, Austin, TX 78749 (512) 791-9855
  • 7221 John Blocker Ct, Austin, TX 78749 (512) 330-4048
  • 8128 Forest Heights Ln, Austin, TX 78749

Work

Company: Amd 2004 to Nov 2010 Position: Senior server system designer

Education

School / High School: The University of Texas at Austin 2008 to 2009 Specialities: Design

Skills

Static Timing Analysis • Functional Verification • Rtl Design • Processors • Vlsi • Verilog • Microprocessors • Eda • X86 • Integrated Circuit Design • Hardware Architecture • Computer Architecture • Asic • Debugging • Semiconductors • Soc

Industries

Computer Hardware

Professional Records

Medicine Doctors

Thomas Madaelil Photo 1

Thomas Madaelil

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Specialties:
Internal Medicine

Resumes

Resumes

Thomas Madaelil Photo 2

Logic Design Engineer

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Location:
Austin, TX
Industry:
Computer Hardware
Work:
Amd 2004 - Nov 2010
Senior Server System Designer

Intel Corporation 2004 - Nov 2010
Logic Design Engineer
Education:
The University of Texas at Austin 2008 - 2009
The University of Texas at Austin 2000 - 2004
Skills:
Static Timing Analysis
Functional Verification
Rtl Design
Processors
Vlsi
Verilog
Microprocessors
Eda
X86
Integrated Circuit Design
Hardware Architecture
Computer Architecture
Asic
Debugging
Semiconductors
Soc

Publications

Us Patents

Configurable Computer System

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US Patent:
20080114918, May 15, 2008
Filed:
Nov 9, 2006
Appl. No.:
11/595637
Inventors:
Ravi B. Bingi - Austin TX, US
Ranger H. Lam - Austin TX, US
Thomas Madaelil - Austin TX, US
Lloyd W. Gauthier - Austin TX, US
Brian E. Longhenry - Austin TX, US
Kristy M. Cates - Austin TX, US
Christopher E. Tressler - Austin TX, US
International Classification:
G06F 13/00
US Classification:
710300
Abstract:
A method for providing multiple configurations for a computer system. The method provides interconnection of processor boards in a first configuration and a second configuration. In the first configuration, a first plurality of processor boards are interconnected through a first backplane. In a second configuration, a second plurality of processor boards are interconnected through a second backplane. The first and second pluralities of processor boards are interchangeable with each other.
Thomas George Madaelil from Austin, TX, age ~43 Get Report