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Teymur Bakhishev Phones & Addresses

  • 1567 Clarita Ave, San Jose, CA 95130
  • 1950 Rose St APT 2, Berkeley, CA 94709
  • 1 Regalia Dr, Novato, CA 94947
  • San Rafael, CA
  • Santa Clara, CA
  • San Francisco, CA

Publications

Us Patents

Semiconductor Structure With Multiple Transistors Having Various Threshold Voltages And Method Of Fabrication Thereof

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US Patent:
20140001571, Jan 2, 2014
Filed:
Jun 25, 2013
Appl. No.:
13/926555
Inventors:
Teymur Bakhishev - San Jose CA, US
Lance Scudder - Sunnyvale CA, US
Paul E. Gregory - Palo Alto CA, US
Michael Duane - San Carlos CA, US
Pushkar Ranade - Los Gatos CA, US
Lucian Shifren - San Jose CA, US
Thomas Hoffmann - Los Gatos CA, US
International Classification:
H01L 27/088
H01L 29/66
US Classification:
257392, 438197
Abstract:
A semiconductor structure includes first, second, and third transistor elements each having a first screening region concurrently formed therein. A second screening region is formed in the second and third transistor elements such that there is at least one characteristic of the screening region in the second transistor element that is different than the second screening region in the third transistor element. Different characteristics include doping concentration and depth of implant, in addition, a different characteristic may be achieved by concurrently implanting the second screening region in the second and third transistor element followed by implanting an additional dopant into the second screening region of the third transistor element

Semiconductor Structure With Reduced Junction Leakage And Method Of Fabrication Thereof

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US Patent:
8637955, Jan 28, 2014
Filed:
Aug 31, 2012
Appl. No.:
13/600647
Inventors:
Lingquan Wang - Los Gatos CA, US
Teymur Bakhishev - San Jose CA, US
Dalong Zhao - San Jose AZ, US
Pushkar Ranade - Los Gatos CA, US
Sameer Pradhan - San Jose CA, US
Thomas Hoffmann - Los Gatos CA, US
Lucian Shifren - San Jose CA, US
Lance Scudder - Sunnyvale CA, US
Assignee:
SuVolta, Inc. - Los Gatos CA
International Classification:
H01L 29/15
H01L 29/167
H01L 29/36
US Classification:
257506, 257 74, 257E29027, 257E29025, 438565, 438545, 438508, 438762, 438492
Abstract:
A semiconductor structure is formed with a NFET device and a PFET device. The NFET device is formed by masking the PFET device regions of a substrate, forming a screen layer through epitaxial growth and in-situ doping, and forming an undoped channel layer on the screen layer through epitaxial growth. The PFET device is similarly formed by masking the NFET regions of a substrate, forming a screen layer through epitaxial growth and in-situ doping, and forming an undoped channel layer on the screen layer through epitaxial growth. An isolation region is formed between the NFET and the PFET device areas to remove any facets occurring during the separate epitaxial growth phases. By forming the screen layer through in-situ doped epitaxial growth, a reduction in junction leakage is achieved versus forming the screen layer using ion, implantation.

Method And System For Associating Relevant Information With A Point Of Interest On A Virtual Representation Of A Physical Object Created Using Digital Input Data

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US Patent:
20190385364, Dec 19, 2019
Filed:
Dec 12, 2018
Appl. No.:
16/218455
Inventors:
John Joseph - Burlingame CA, US
Mothusi Hans Colban Pahl - Oakland CA, US
Teymur Bakhishev - San Jose CA, US
Jonathan C. Schaffer - Burlingame CA, US
International Classification:
G06T 17/20
G06F 17/27
G06T 7/50
G06T 7/70
Abstract:
In one embodiment, a computerized method useful for associating relevant information with a point of interest on a virtual representation of a physical object created using digital input data includes receiving at least one sensor input of a physical object. The method uses the at least one set of sensor inputs to create a virtual representation of the physical object. The method determines at least one point of interest on the physical object. The method obtains at least one point of relevant informational input data. The method associates the at least one point of relevant informational input data with at least one point of interest on the physical object.

Systems And Methods For Precise Radio Frequency Localization Using Time Difference Of Arrival

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US Patent:
20190069264, Feb 28, 2019
Filed:
Aug 23, 2017
Appl. No.:
15/684893
Inventors:
- San Bruno CA, US
Teymur Bakhishev - San Jose CA, US
Lingkai Kong - Palo Alto CA, US
Assignee:
LOCIX Inc. - San Bruno CA
International Classification:
H04W 64/00
G01S 5/06
Abstract:
Systems and apparatuses for determining locations of wireless nodes in a network architecture are disclosed herein. In one example, an asynchronous system includes first and second wireless nodes each having a wireless device with one or more processing units and RF circuitry for transmitting and receiving communications in the wireless network architecture. The system also includes a wireless node having an unknown location and a wireless device with a transmitter and a receiver to enable communications with the first and second third wireless nodes in the wireless network architecture. The first wireless node transmits a communication to the second wireless node and the wireless node having an unknown location, receives a communication with an acknowledge packet from the wireless node, and determines time difference of arrival information between the first and second wireless nodes.

Semiconductor Structure With Multiple Transistors Having Various Threshold Voltages And Method Of Fabrication Thereto

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US Patent:
20180261683, Sep 13, 2018
Filed:
Apr 26, 2018
Appl. No.:
15/963598
Inventors:
- Kuwana, JP
Teymur Bakhishev - San Jose CA, US
Lance Scudder - Sunnyvale CA, US
Paul E. Gregory - Palo Alto CA, US
Michael Duane - San Carlos CA, US
Pushkar Ranade - Los Gatos CA, US
Lucian Shifren - San Jose CA, US
Thomas Hoffmann - Los Gatos CA, US
Assignee:
Mie Fujitsu Semiconductor Limited - Kuwana
International Classification:
H01L 29/66
H01L 21/8234
H01L 27/088
H01L 29/10
Abstract:
A semiconductor structure includes first, second, and third transistor elements each having a first screening region concurrently formed therein. A second screening region is formed in the second and third transistor elements such that there is at least one characteristic of the screening region in the second transistor element that is different than the second screening region in the third transistor element. Different characteristics include doping concentration and depth of implant. In addition, a different characteristic may be achieved by concurrently implanting the second screening region in the second and third transistor element followed by implanting an additional dopant into the second screening region of the third transistor element

Systems And Methods For Determining Locations Of Wireless Sensor Nodes In A Tree Network Architecture Having Mesh-Based Features

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US Patent:
20170359692, Dec 14, 2017
Filed:
Aug 8, 2017
Appl. No.:
15/672128
Inventors:
Lingkai Kong - Palo Alto CA, US
Teymur Bakhishev - San Jose CA, US
Tommi Ylamurto - Los Gatos CA, US
Vivek Subramanian - Orinda CA, US
Manu Seth - Berkeley CA, US
International Classification:
H04W 4/02
H04W 84/18
Abstract:
Systems and methods for determining locations of wireless sensor nodes in a tree network architecture having mesh-based features are disclosed herein. In one embodiment, a system includes a hub having one or more processing units and RF circuitry for transmitting and receiving communications with sensor nodes to enable bi-directional communications. The one or more processing units of the hub execute instructions to configure the system with a tree architecture for communications between the hub and the sensor nodes, and to configure the system temporarily with a mesh-based architecture for determining location information for the sensor nodes.

Semiconductor Structure With Multiple Transistors Having Various Threshold Voltages

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US Patent:
20170141209, May 18, 2017
Filed:
Jan 30, 2017
Appl. No.:
15/419315
Inventors:
- Kuwana, JP
Teymur Bakhishev - San Jose CA, US
Lance Scudder - Sunnyvale CA, US
Paul E. Gregory - Palo Alto CA, US
Michael Duane - San Carlos CA, US
Pushkar Ranade - Los Gatos CA, US
Lucian Shifren - San Jose CA, US
Thomas Hoffmann - Los Gatos CA, US
International Classification:
H01L 29/66
H01L 27/088
H01L 21/8234
H01L 21/265
H01L 21/283
Abstract:
A semiconductor structure includes first, second, and third transistor elements each having a first screening region concurrently formed therein. A second screening region is formed in the second and third transistor elements such that there is at least one characteristic of the screening region in the second transistor element that is different than the second screening region in the third transistor element. Different characteristics include doping concentration and depth of implant. In addition, a different characteristic may be achieved by concurrently implanting the second screening region in the second and third transistor element followed by implanting an additional dopant into the second screening region of the third transistor element

Systems And Methods For Determining Locations Of Wireless Sensor Nodes In A Network Architecture Having Mesh-Based Features For Localization

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US Patent:
20170052247, Feb 23, 2017
Filed:
Aug 19, 2015
Appl. No.:
14/830671
Inventors:
- San Bruno CA, US
Teymur Bakhishev - San Jose CA, US
Tommi Ylamurto - Los Gatos CA, US
Vivek Subramanian - Orinda CA, US
Manu Seth - Berkeley CA, US
Assignee:
Dragonfly Technology Inc. - San Bruno CA
International Classification:
G01S 5/10
H04W 64/00
Abstract:
Systems and methods for determining locations of wireless sensor nodes in a network architecture having mesh-based features are disclosed herein. In one example, a computer-implemented method for localization of nodes in a wireless network includes causing, with processing logic of a hub, the wireless network having nodes to be configured as a first network architecture for a first time period for localization. The method further includes determining, with the processing logic of the hub, localization of at least two nodes using at least one of frequency channel overlapping communications, frequency channel stepping communications, multi-channel wide band communications, and ultra-wide band communications for at least one of time of flight and signal strength techniques. The method further includes causing the wireless network to be configured in a second network architecture having narrow-band communications upon completion of localization.
Teymur T Bakhishev from San Jose, CA, age ~43 Get Report