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Shoban S Jagathesan

from San Jose, CA
Age ~55
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Also known as:
Sumithra D Jagathesan, Sumithra S Jagathesan, Sumithra L Jagathesan, Shoban S Jagadhesan, Sumithra D Ramanathan, Jagathesan Shoban, Frank Page, Frank Paige
Phone and address:
3549 Westview Dr, San Jose, CA 95148
(972) 897-3006
Related to:
Brian D Frank, 67Narain K JagadhesanM JagathesanJoseph M Page, 34Senthil R Kumar, 56Sumithra R Jagathesan, 54Luann R Page, 67
Connected to:
Ganapathy Jagatheesan, 66Krishnan Jagathrakshakan, 44Ajit B Jagdale, 53Amit S Jagdale, 46Jayashree S Jagdale, 50Rakesh D Jagdale, 48Rupali M Jagdale, 48Rushikesh P Jagdale, 35Shivaji Y Jagdale, 42Ann Jagdeo, 66

Shoban Jagathesan Phones & Addresses

  • 3549 Westview Dr, San Jose, CA 95148 (972) 897-3006
  • Cupertino, CA
  • Austin, TX
  • 411 Walnut Dr, Plano, TX 75094
  • 2246 Ashley Park Dr, Plano, TX 75074 (972) 423-9369
  • Murphy, TX

Work

Company: Ti Position: Design engineer

Education

Degree: (Ph.D) School / High School: The University of Texas at Austin 1994 to 1997 Specialities: Computer Architecture

Skills

Debugging • Soc • Digital Signal Processors • Specman • Systemverilog • Semiconductors • Asic • Embedded Systems • Vhdl • Perl • C • Software Development • Vlsi • Uvm • System Architecture • Signal Processing • Cross Functional Team Leadership • System C

Languages

English

Industries

Semiconductors

Resumes

Resumes

Shoban Jagathesan Photo 1

Technical Manager At Tsmc North America

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Location:
3549 Westview Dr, San Jose, CA 95148
Industry:
Semiconductors
Work:
TI
Design Engineer
Education:
The University of Texas at Austin 1994 - 1997
(Ph.D), Computer Architecture Texas A&M University 1991 - 1993
MS, Image processing Anna University 1987 - 1991
BE, Electrical and communication
Skills:
Debugging
Soc
Digital Signal Processors
Specman
Systemverilog
Semiconductors
Asic
Embedded Systems
Vhdl
Perl
C
Software Development
Vlsi
Uvm
System Architecture
Signal Processing
Cross Functional Team Leadership
System C
Languages:
English

Publications

Us Patents

Command Re-Ordering In Hub Interface Unit Based On Priority

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US Patent:
7716388, May 11, 2010
Filed:
May 13, 2005
Appl. No.:
11/128568
Inventors:
Shoban Srikrishna Jagathesan - Murphy TX, US
Sanjive Agarwala - Richardson TX, US
Kyle Castille - Houston TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F 13/28
G06F 15/167
US Classification:
710 22, 709212
Abstract:
Command reordering in the hub interface unit (HIU) of Enhanced Direct Memory Access (EDMA) functions is described. Without command reordering in the EDMA, commands are issued by the HIU to the peripheral in order of issue. If the higher priority transfers are issued later by the EDMA, the previously issued lower priority transfers would block the higher priority transfers. Command reordering in the HIU causes transfers to be reordered and issued to the peripheral based on their priority. Reordering allows the EDMA and HIU to give due service to high priority transfer requests with decreased weight placed on the order in which the requests were issued.

Hardware Configurable Hub Interface Unit

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US Patent:
20060259569, Nov 16, 2006
Filed:
May 13, 2005
Appl. No.:
11/128680
Inventors:
Shoban Jagathesan - Murphy TX, US
Sanjive Agarwala - Richardson TX, US
Raguram Damodaran - Plano TX, US
International Classification:
G06F 15/167
US Classification:
709213000
Abstract:
A data transfer apparatus with hub and ports includes design configurable hub interface units (HIU) between the ports and corresponding external application units. The configurable HIU provides a single generic superset HIU that can be configured for specific more specialized applications during implementation as part of design synthesis. Configuration allows the super-set configurable HIU to be crafted into any one of several possible special purpose HIUs. This configuration is performed during the design phase and is not applied in field applications. Optimization aimed at eliminating functional blocks not needed in a specific design and simplifying and modifying other functional blocks allows for the efficient configuring of these other types of HIUs. Configuration of HIUs for specific needs can result in significant savings in silicon area and in power consumption.
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Shoban S Jagathesan from San Jose, CA, age ~55 Get Report