Resumes
Resumes
Shahram Mahdavi Phones & Addresses
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300 Richfield Dr APT 1, San Jose, CA 95129
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Sunnyvale, CA
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5608 Walnut Springs Ct, Dallas, TX 75252 (469) 737-8696 (972) 239-2388
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12009 Coit Rd, Dallas, TX 75251 (972) 239-2388 (972) 770-0062
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15825 Avenida Venusto, San Diego, CA 92128 (858) 674-4996
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Colton, TX
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17915 Caminito Pinero, San Diego, CA 92128 (858) 674-4996
Work
Position:
Sales Occupations
Education
Degree:
High school graduate or higher
Publications
Us Patents
Injection Locked Frequency Divider And Associated Methods
View pageUS Patent:
8410830, Apr 2, 2013
Filed:
Apr 29, 2010
Appl. No.:
12/770383
Inventors:
Shahram Mahdavi - Sunnyvale CA, US
Assignee:
Silicon Laboratories Inc. - Austin TX
International Classification:
H03B 19/06
US Classification:
327118, 327117, 327120, 377 47
Abstract:
An apparatus includes an injection locking frequency divider, which includes a first resonant tank that has a first resonance frequency and a common mode path that includes a second resonant tank, and has a second resonance frequency that is a harmonic of the first resonance frequency. The second resonant tank is adapted to receive a first signal having an oscillation frequency near the harmonic of the first resonance frequency to cause the first resonant tank to provide a second signal that is locked to the first signal.
Bias Voltage Circuit With Ultra Low Output Impedance
View pageUS Patent:
7135929, Nov 14, 2006
Filed:
Apr 21, 2004
Appl. No.:
10/828826
Inventors:
Damian Costa - San Diego CA, US
Shahram Mahdavi - San Diego CA, US
John Groe - Poway CA, US
Shahram Mahdavi - San Diego CA, US
John Groe - Poway CA, US
Assignee:
Sequoia Communications - San Diego CA
International Classification:
H03F 3/04
US Classification:
330296, 330297
Abstract:
A bias voltage circuit with ultra low output impedance. The circuit incorporates feedback to reduce the output impedance at both low and RF frequencies. The bias circuit outputs a bias signal for biasing an amplifier. The bias circuit includes an input stage that receives an input signal and produces the bias signal at an output terminal that is coupled to a gain stage. The bias circuit also includes a load coupled to the input stage at a first terminal, and a feedback circuit coupled between the first terminal and the gain stage.