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Scott M Willenborg

from Stewartville, MN
Age ~53
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Also known as:
Scot Willenborg
Phone and address:
620 Tower Ct, Pleasant Grove, MN 55976
(507) 252-9352
Related to:
Barbara J Moyer, 64Brad A Koopman, 48Jason E Kreischer, 40Penny J Reittinger, 62Chris Kinnison, 48
Connected to:
Brandon Willenborg, 35Daniel H Willenberg, 60Eric A Willenbrink, 47Heather M Willenbring, 41Henry J Willenbrink, 61Jane Willenbrink, 40Jennifer Willenberg, 42Jeremy K Willenborg, 45Kim Willen, 48Megan E Willenborg, 40

Scott Willenborg Phones & Addresses

  • 620 Tower Ct, Stewartville, MN 55976 (507) 252-9352 (507) 533-1092
  • 4501 8Th St, Rochester, MN 55901 (507) 252-9352
  • Dyersville, IA
  • Dubuque, IA
  • 620 Tower Ct SE, Stewartville, MN 55976

Work

Position: Executive, Administrative, and Managerial Occupations

Resumes

Resumes

Scott Willenborg Photo 1

Chief Engineer

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Location:
Stewartville, MN
Work:
Ibm
Chief Engineer
Scott Willenborg Photo 2

Chief Engineer

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Location:
620 Tower Ct southeast, Stewartville, MN 55976
Industry:
Computer Hardware
Work:
Ibm
Chief Engineer
Education:
Iowa State University
Skills:
Vlsi
Asic
Verilog
Pcie
Functional Verification
Microprocessors
Logic Design
Physical Design
Vhdl
Ethernet

Publications

Us Patents

Intelligent Pci/Pci-X Host Bridge

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US Patent:
6581129, Jun 17, 2003
Filed:
Oct 7, 1999
Appl. No.:
09/414339
Inventors:
Pat Allen Buckland - Austin TX
Daniel Frank Moertl - Rochester MN
Danny Marvin Neal - Round Rock TX
Steven Mark Thurber - Austin TX
Scott Michael Willenborg - Stewartville MN
Curtis Carl Wollbrink - Rochester MN
Adalberto Guillermo Yanes - Rochester MN
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 1336
US Classification:
710306, 710311, 710312, 710313
Abstract:
A PCI host bridge and an associated method of use are disclosed. The PCI host bridge includes a host bus interface, an I/O bus interface, and a PCI operation detection circuit. The host bus interface is suitable for communicating with a host bus of a data processing system and the I/O bus interface is suitable for communicating with a primary PCI bus operating in PCI-X mode. The PCI operation detection circuit is adapted to detect a PCI-X operation from the primary PCI bus that may have issued from a PCI mode adapter coupled to a secondary PCI bus. The detection circuit is further adapted to generate a modified operation for forwarding to the host bus in response to determining that the PCI-X operation may have originated from a PCI. mode adapter.

Command Ordering Based On Dependencies

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US Patent:
7136938, Nov 14, 2006
Filed:
Mar 27, 2003
Appl. No.:
10/401258
Inventors:
Scott D. Clark - Rochester MN, US
Scott M. Willenborg - Stewartville MN, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 3/00
US Classification:
710 6, 710 55
Abstract:
A method, apparatus, system, and signal-bearing medium that in various embodiments determine whether to execute a command in a queue or whether to wait until another command or commands completed. The determination is based on a combination of an in-use vector and a scorecard vector. The in-use vector indicates which slots in various queues contain commands. The scorecard vector indicates the dependencies between various queues. In this way, the scorecard vector, and the thus the queue dependencies can be set and modified after the logic that processes the commands has been designed.

Concurrent Read Access And Exclusive Write Access To Data In Shared Memory Architecture

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US Patent:
7308539, Dec 11, 2007
Filed:
Dec 17, 2004
Appl. No.:
11/016218
Inventors:
Ronald Edward Fuhs - Rochester MN, US
Ryan Scott Haraden - Rochester MN, US
Nathaniel Paul Sellin - Rochester MN, US
Scott Michael Willenborg - Stewartville MN, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 12/00
G06F 13/00
G06F 13/28
US Classification:
711141, 711144, 711145, 711147, 711150, 711168, 710106
Abstract:
Concurrent read access and exclusive write access are provided in a shared memory architecture to permit one or more devices in the shared memory architecture to maintain read access to a block of memory such as a cache line while one device has exclusive permission to modify that block of memory. By doing so, a device that has permission to modify may make updates to its copy of the block of memory without invalidating other copies of the block of memory, and potentially enabling other devices to continue to read data from their respective copies of the block of memory without having to retrieve the updated copy of the block of memory.

Method And Apparatus For Coalescing Acknowledge Packets Within A Server

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US Patent:
7324525, Jan 29, 2008
Filed:
Dec 9, 2004
Appl. No.:
11/008799
Inventors:
Ronald E. Fuhs - Rochester MN, US
Calvin C. Paynton - Byron MN, US
Steven L. Rogers - Rochester MN, US
Nathaniel P. Sellin - Rochester MN, US
Scott M. Willenborg - Stewartville MN, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H04L 12/28
H04L 12/66
US Classification:
3703957, 370389, 370412
Abstract:
A method for coalescing acknowledge packets within a server is disclosed. A Read Request queue having multiple queue pair entries is provided. Each of the queue pair entries includes a packet sequence number (PSN) field and an indicator field. In response to a receipt of a Write Request packet, an indicator field of a queue pair entry is set to indicate that an Ack packet has been queued within the queue pair entry, and a PSN of the Write Request packet is written into a PSN field of the queue pair entry. In addition, a Queue Write Pointer is maintained to point to the queue pair entry. In response to a receipt of a Read Request packet, the indicator field of the queue pair entry is set to indicate that a Read Request packet has been queued within the queue pair entry, and a PSN of the Read Request packet is written into the PSN field of the queue pair entry. Also, the Queue Write Pointer is advanced to point to a queue pair entry that is subsequent to the queue pair entry.

Apparatus And Method For Tracking Packets In A Reliably Connected Transmission System

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US Patent:
7328390, Feb 5, 2008
Filed:
Apr 12, 2007
Appl. No.:
11/734690
Inventors:
Ronald Edward Fuhs - Rochester MN, US
Steven Lyn Rogers - Rochester MN, US
Nathaniel Paul Sellin - Rochester MN, US
Scott Michael Willenborg - Rochester MN, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G08C 25/02
H04L 1/18
US Classification:
714748
Abstract:
A method and apparatus tracks packets and reliably transmits data over a computer transmission system with a reduced amount of memory needed in the transmission interface. The invention eliminates the need to keep all the packets of data queued until the acknowledge message for that data has arrived. Instead, it keeps track of how many packets have been sent and which packets correspond to the end of a message, marking them off when acknowledge messages are received. If packets are lost, the invention determines which packet were lost, backs up to the lost packet, re-fetches the data and resends it. Embodiments of the present invention eliminate the need to queue packets, reducing silicon size and allowing the available bandwidth of the output bus to be more fully utilized.

Apparatus And Method For Tracking Packets In A Reliably Connected Transmission System

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US Patent:
7360140, Apr 15, 2008
Filed:
Sep 23, 2004
Appl. No.:
10/948778
Inventors:
Ronald Edward Fuhs - Rochester MN, US
Steven Lyn Rogers - Rochester MN, US
Nathaniel Paul Sellin - Rochester MN, US
Scott Michael Willenborg - Stewartville MN, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G08C 25/02
H04L 1/18
US Classification:
714748
Abstract:
A method and apparatus tracks packets and reliably transmits data over a computer transmission system with a reduced amount of memory needed in the transmission interface. The invention eliminates the need to keep all the packets of data queued until the acknowledge message for that data has arrived. Instead, it keeps track of how many packets have been sent and which packets correspond to the end of a message, marking them off when acknowledge messages are received. If packets are lost, the invention determines which packet were lost, backs up to the lost packet, re-fetches the data and resends it. Embodiments of the present invention eliminate the need to queue packets, reducing silicon size and allowing the available bandwidth of the output bus to be more fully utilized.

Command Ordering Among Commands In Multiple Queues Using Hold-Off Vector Generated From In-Use Vector And Queue Dependency Scorecard

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US Patent:
7392367, Jun 24, 2008
Filed:
Jun 19, 2006
Appl. No.:
11/471043
Inventors:
Scott D. Clark - Rochester MN, US
Scott M. Willenborg - Stewartville MN, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 9/00
US Classification:
712216, 710 6, 712214
Abstract:
A method, apparatus, system, and signal-bearing medium that in various embodiments determine whether to execute a command in a queue or whether to wait until another command or commands completed. The determination is based on a combination of an in-use vector and a scorecard vector. The in-use vector indicates which slots in various queues contain commands. The scorecard vector indicates the dependencies between various queues. In this way, the scorecard vector, and the thus the queue dependencies can be set and modified after the logic that processes the commands has been designed.

Method For Performing A Packet Header Lookup

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US Patent:
7492771, Feb 17, 2009
Filed:
Apr 1, 2005
Appl. No.:
11/096362
Inventors:
Claude Basso - Raleigh NC, US
Jean Louis Calvignac - Raleigh NC, US
Chih-jen Chang - Apex NC, US
Philippe Damon - Raleigh NC, US
Ronald Edward Fuhs - Rochester MN, US
Natarajan Vaidhyanathan - Carrboro NC, US
Fabrice Jean Verplanken - La Gaude, FR
Colin Beaton Verrilli - Apex NC, US
Scott Michael Willenborg - Stewartville MN, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H04L 12/56
US Classification:
37039532
Abstract:
A method for performing a lookup for a packet in a computer network are disclosed. The packet includes a header. The method includes providing a parser, providing a lookup engine coupled with the parser, and providing a processor coupled with the lookup engine. The parser is for parsing the packet for the header prior to receipt of the packet being completed. The lookup engine performs a lookup for the header and returns a resultant. In one aspect, the lookup includes performing a local lookup of a cache that includes resultants of previous lookups. The processor processes the resultant.
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Scott M Willenborg from Stewartville, MN, age ~53 Get Report