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Saurabh Kangutkar

from Portland, OR
Age ~42
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Related to:
Yugandhara S Kangutkar, 45Sameer R Kangutkar, 44
Connected to:
Krystal Kanh, 35Eric S Kanhai, 47Kelly Kanhai, 47Mitra Kanhai, 57Sagar S Kanhere, 40Sanmeet R Kanhere, 35Abdul R Kani, 63Daniel A Kani, 43Marjan H Kani, 57Naveen M Kani, 41

Saurabh Kangutkar Phones & Addresses

  • 12524 NW Millford St, Portland, OR 97229
  • Hillsboro, OR

Work

Company: Self emplyed Jan 2013 Address: Mumbai India Position: Design and verification engineer

Education

Degree: M.S. School / High School: Portland State University 2009 to 2010 Specialities: Electrical and Computer Engineering

Industries

Electrical/Electronic Manufacturing

Resumes

Resumes

Saurabh Kangutkar Photo 1

Saurabh Kangutkar Hillsboro, OR

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Work:
Intel Corporation

Jun 2011 to 2000
Component Design Engineer
The Portland State University
Portland, OR
Dec 2009 to Sep 2010
Graduate Research Associate (Integrated Circuit design and test Laboratory)
NYU-POLY University
Brooklyn, NY
Sep 2008 to Dec 2008
Graduate Research Assistant
SBOM Electronics
Mumbai, Maharashtra
Jul 2007 to Jun 2008
Graduate Research Associate (Integrated Circuit design and test Laboratory)
Tecnomic Marketing Services
Mumbai, Maharashtra
Nov 2006 to Jun 2007
Field Application Engineer
SVAN Teletronics
Mumbai, Maharashtra
Oct 2004 to Nov 2005
Tele-communication Engineer
Education:
Portland State University
Portland, OR
2009 to 2010
Master's in Electrical Engineering
University of Mumbai
Bangalore, Karnataka
2001 to 2004
Diploma in VLSI-designing
Skills:
Programming: C, MATLAB, Perl (Scripting) HDL Language: Verilog, VHDL, System-Verilog. Hardware Simulation & Emulation : Modelsim, Veloce SOLO 16 FPGA Design Environment : Xilinx ISE, Actel Libero IDE DFT Tools: DFT adviser, Fastscan, MBIST architecture, Silicon sculptor, FlashPro, Silicon Exlporer. Backend Tools : H spice, Pspice, Magma, LT-spice, Cadence
Saurabh Kangutkar Photo 2

Saurabh Kangutkar Portland, OR

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Work:
Portland State University

Dec 2009 to Sep 2010
Lookahead Regular expression Detection project at NYU-POLY

Sep 2008 to Dec 2008
SBOM ELECTRONICS
Mumbai, Maharashtra
Jul 2007 to Jun 2008
Design and Verification Engineer
Tecnomic Marketing Services (P) ltd
Hyderabad, Andhra Pradesh
Nov 2006 to Jun 2007
Field Application Engineer
Sandeepani school

Dec 2005 to Jun 2006
Low power FPGA
Mumbai, Maharashtra
Oct 2004 to Nov 2005
Tele-communication Engineer
Education:
Portland State University
Portland, OR
Apr 2009 to Dec 2010
Master of Engineering in Digital Integrated Circuit design
Polytechnic University
Brooklyn, NY
Aug 2008 to Dec 2008
Master of Science in Electrical Engineering
Mumbai University
Mumbai, Maharashtra
Mar 2001 to Dec 2004
Bachelor of Engineer in Electronics & Telecommunication
Saurabh Kangutkar Photo 3

Design And Verification Engineer At Self Emplyed

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Position:
Design and Verification Engineer at Self emplyed
Location:
Portland, Oregon Area
Industry:
Electrical/Electronic Manufacturing
Work:
Self emplyed - Mumbai India since Jan 2013
Design and Verification Engineer
Intel Corporation - Hillsboro OR Jun 2011 - Sep 2012
Component Design Engineer
Portland State University Dec 2009 - Sep 2010
Graduate Reasearch assistant
Polytechnic Institute of New York University Sep 2008 - Dec 2008
Gradutae Research Assistant
SBOM Electronics Jul 2007 - Jun 2008
Design and Verification Engineer
Education:
Portland State University 2009 - 2010
M.S., Electrical and Computer Engineering Polytechnic University 2008 - 2008
M.S., Electrical Engineering Sandeepani school of VLSI design 2005 - 2006
PG-Diploma, VLSI system design University of Mumbai 1998 - 2004
B.E., Electronics and Telecommunication Engineer
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Saurabh Kangutkar from Portland, OR, age ~42 Get Report