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Samuel J Liang

from Hyannis, MA
Age ~59

Samuel Liang Phones & Addresses

  • 10 Island View Rd, Hyannis, MA 02601 (508) 771-1003
  • 120 Harbor Bluff Rd, Hyannis, MA 02601 (508) 771-5322
  • Reading, MA
  • North Palm Beach, FL
  • 4 Sweeney Ridge Rd, Bedford, MA 01730 (781) 275-9870
  • Newton Center, MA
  • Billerica, MA
  • Burlington, MA
  • Lowell, MA
  • Boxford, MA
  • 4 Sweeney Ridge Rd, Bedford, MA 01730 (781) 258-8198

Work

Position: Transportation and Material Moving Occupations

Education

Degree: Associate degree or higher

Business Records

Name / Title
Company / Classification
Phones & Addresses
Samuel J. Liang
Manager
R & L INSURANCE AGENCY, LLC
189 Wl Ave, Newton Center, MA 02459
Newton Center, MA 02459
Samuel J. Liang
Manager
LCM CAPITAL MANAGEMENT, LLC
189 Wl Ave, Newton Center, MA 02459
Newton Center, MA 02459
Samuel J. Liang
Rubino & Liang, LLC
Management Consulting Services
189 Wl Ave, Newton, MA 02459
(617) 630-8787, (617) 630-8325
Samuel J. Liang
Manager
RL CAPITAL MANAGEMENT LLC
Newton Center, MA 02459
Samuel J. Liang
Manager
FL REALTY LLC
4 Sweeney Rdg Rd, Bedford, MA 01730
Samuel Liang
Manager, Principal
FLETCHER HOMES LLC
Single-Family House Construction
4 Sweeney Rdg Rd, Bedford, MA 01730

Publications

Us Patents

Synchronizing Circuit For Use With A Telecommunication System

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US Patent:
43706487, Jan 25, 1983
Filed:
Mar 31, 1981
Appl. No.:
6/249399
Inventors:
Theodore Wagner - West Palm Beach FL
Ramesh M. Vyas - Boca Raton FL
Samuel Liang - Deerfield Beach FL
Assignee:
Siemens Corporation - Iselin NJ
International Classification:
H04J 306
H04Q 1104
US Classification:
3408252
Abstract:
A synchronizing circuit for use with a digital communication system is disclosed. A serial data stream is arranged in frames composed of at least two data words containing a synchronization signalling code and binary coded information, respectively. For detecting the alignment of consecutive frames the synchronizing circuit includes a serial/parallel converter and a synchronizing detector logic network for generating two control signals indicating the presence of the synchronization code in form of a normal synchronizing bit pattern or an inverted synchronizing bit pattern respectively. An AND-gate logically links the first control signal delayed by one pulse frame to the undelayed second control signal and generates a synchronizing signal. A time slot generator produces enabling signals by means of counting subsequent system clock pulses under control of this synchronizing signal such that during receiving of different data words of a frame a respective one of the enabling signals is present.
Samuel J Liang from Hyannis, MA, age ~59 Get Report