Inventors:
Ronald L. Feiller - Whitehall PA
Hon Shing Lau - Allentown PA
Le Tieu Ly - Allentown PA
Assignee:
Lucent Technologies Inc. - Murray Hill NJ
International Classification:
G06F 750
Abstract:
An integrated circuit having a fast carry generation adder for adding together two input signals has an initial stage and two or more intermediate stages. The adder may also include a final stage. Each intermediate stage has a carry mux and these carry muxes are grouped together, for example, adjacent to the initial stage and adjacent to the first intermediate stage. By grouping the carry muxes together, for example, in a column below the initial stage, the fast carry generation adder may be both faster and smaller than conventional adders and may reduce or even eliminate the need for any buffering between successive carry muxes.