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Roger Yacobucci Phones & Addresses

  • 3113 Rookery Rd, Fort Collins, CO 80528 (970) 223-9660
  • Derry, PA

Work

Company: Lsi inc 2002 Position: Failure analysis engineer

Education

School / High School: Colorado State University 1986 Specialities: BS in Electrical Engineering

Resumes

Resumes

Roger Yacobucci Photo 1

Roger Yacobucci

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Location:
Fort Collins, CO
Roger Yacobucci Photo 2

Roger Yacobucci Fort Collins, CO

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Work:
LSI Inc

2002 to 2000
Failure Analysis Engineer

LSI Logic Incorporated

1997 to 2002
Test Engineer

Woodward Governor Company

1997 to 1997
Special Projects Engineer

Woodward Governor Company

1994 to 1996
Electrical Systems Engineer

Woodward Governor Company

1993 to 1994
Shop Floor Team Member

Woodward Governor Company

1993 to 1994
Project Manager

Woodward Governor Company

1990 to 1991
Supervisor

Woodward Governor Company

1988 to 1990
Applications Engineer

Climax Molybdenum Company

1985 to 1986

Climax Molybdenum Company

1980 to 1985

Climax Molybdenum Company

1979 to 1980
Survey Engineer

Marblehead Limestone Company

1979 to 1980
Co-op Mine Engineer

Education:
Colorado State University
1986 to 1988
BS in Electrical Engineering

Penn State University
1976 to 1979
BS in Mining Engineering

Colorado State University
MS in Engineering Management

Publications

Us Patents

Failure Analysis And Testing Of Semi-Conductor Devices Using Intelligent Software On Automated Test Equipment (Ate)

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US Patent:
7430700, Sep 30, 2008
Filed:
Feb 1, 2007
Appl. No.:
11/670031
Inventors:
Roger Yacobucci - Fort Collins CO, US
Assignee:
LSI Logic Corporation - Milpitas CA
International Classification:
G06F 11/00
G06F 17/50
G01R 31/28
US Classification:
714738, 714741, 703 13
Abstract:
The invention provides a number of related methods which improve the test and analysis of integrated circuit devices. A first method of the invention provides a method for pausing on a SCAN based test. A second method of the invention provides a method for using stimulations and responses of a known good device to increase fault coverage of patterns in a test flow. A third method of the invention provides a method to curve trace device buffers on an ATE.

Failure Analysis And Testing Of Semi-Conductor Devices Using Intelligent Software On Automated Test Equipment (Ate)

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US Patent:
7565592, Jul 21, 2009
Filed:
Dec 27, 2007
Appl. No.:
11/964920
Inventors:
Roger Yacobucci - Fort Collins CO, US
Assignee:
LSI Corporation - Milpitas CA
International Classification:
G01R 31/30
G01R 31/08
US Classification:
714745, 324522
Abstract:
The invention provides a number of related methods which improve the test and analysis of integrated circuit devices. A first method of the invention provides a method for pausing on a SCAN based test. A second method of the invention provides a method for using stimulations and responses of a known good device to increase fault coverage of patterns in a test flow. A third method of the invention provides a method to curve trace device buffers on an ATE.

Failure Analysis And Testing Of Semi-Conductor Devices Using Intelligent Software On Automated Test Equipment (Ate)

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US Patent:
20060150041, Jul 6, 2006
Filed:
Jan 4, 2005
Appl. No.:
11/028695
Inventors:
Roger Yacobucci - Fort Collins CO, US
International Classification:
G01R 31/28
US Classification:
714726000
Abstract:
The invention provides a number of related methods which improve the test and analysis of integrated circuit devices. A first method of the invention provides a method for pausing on a SCAN based test. A second method of the invention provides a method for using stimulations and responses of a known good device to increase fault coverage of patterns in a test flow. A third method of the invention provides a method to curve trace device buffers on an ATE.
Roger B Yacobucci from Fort Collins, CO, age ~68 Get Report