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Robert E Servilio

from Washington, NJ
Age ~69
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Also known as:
Robert F Servilio, Robert E Servillo, Roberte E Servilio, Bob Servilio, Lisa Servilio, Kathleen Servilio
Phone and address:
52 New Hampton Rd, Washington, NJ 07882
Related to:
Theodore MoserCarroll Morong, 90Scott Glanville, 62Vernon TerryCatherine Terry
Connected to:
Joel Servillo, 41Patrick J Serville, 79Daniela Servin, 32Diana L Servin, 41Elizabeth Servin, 43Elva Servin, 44Emilia M Servin, 62Hugo Servin, 58Johana P Servin, 31Josefina Servin, 64

Robert Servilio Phones & Addresses

  • 52 New Hampton Rd, Washington, NJ 07882
  • Vestavia, AL
  • Cambridge, MA
  • Waltham, MA
  • Randolph, NJ

Public records

Vehicle Records

Robert Servilio

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Address:
52 New Hampton Rd, Washington, NJ 07882
VIN:
1HGCM56837A216166
Make:
HONDA
Model:
ACCORD
Year:
2007

Publications

Us Patents

Methods And Apparatus For Signal Modification In A Fractional-N Phase Locked Loop System

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US Patent:
7203262, Apr 10, 2007
Filed:
May 13, 2003
Appl. No.:
10/436572
Inventors:
Carol Moy - Morristown NJ, US
Christine DiVincenzo - Califon NJ, US
Eoin Carey - Cork, IE
Herbert Jaeger - Cork, IE
Robert Servilio - Washington NJ, US
Assignee:
M/A-Com, Inc. - Lowell MA
M/A-Com, Eurotec, B.V. - Amsterdam
International Classification:
H03D 3/24
US Classification:
375376
Abstract:
A phase locked loop includes a buffer that synchronizes the transmission of the new count value to the completion of the previous count to avoid errors caused by dithering. The buffer is connected to a count input of the counter and transmits the new count upon receipt of the carryout signal from the counter. Alternatively, the transmission of the new value of N from the buffer is delayed after receipt by the buffer of a carryout signal from the counter. In another embodiment, a delayed version of the carryout signal is used to trigger the buffer to transmit the new count value to the counter. In another feature, a buffer synchronizes phase data to a reference signal before inputting it to a digital modulator of the phase locked loop.

Apparatus, Methods And Articles Of Manufacture For Dynamic Differential Delay Correction

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US Patent:
7254195, Aug 7, 2007
Filed:
Aug 25, 2003
Appl. No.:
10/647617
Inventors:
Robert Servilio - Washington NJ, US
Carol Moy - Morristown NJ, US
Christine DiVincenzo - Califon NJ, US
Yongwen Yang - Hillsboro NJ, US
Assignee:
M/A-Com, Inc. - Lowell MA
International Classification:
H04L 27/08
US Classification:
375345
Abstract:
The invention is directed to a system for dynamically correcting an electromagnetic wave by processing two or more aspects of the electromagnetic wave along two or more separate signal paths; comparing an expected value for at least one of the aspects of the electromagnetic wave with an actual value for the aspect of the electromagnetic wave to generate a correction signal; and applying the correction signal to at least one other aspect of the electromagnetic wave. The aspects of the electromagnetic wave to be processed may be amplitude and phase, where the comparison may be along the phase path and the adjustment along an analog portion of the amplitude path. A digital phase locked loop may be used for the comparison and to generate the correction signal; and a bank of pipeline registers may be used to adjust the amplitude path.
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Robert E Servilio from Washington, NJ, age ~69 Get Report