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Robert A Maraschin

from Cupertino, CA
Age ~86
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Also known as:
Robert C Maraschin, Robt Maraschin, Rober Maraschin
Phone and address:
21629 Edward Way, Cupertino, CA 95014
(408) 253-5477
Related to:
Korrina R Botelho, 30Katelyn Margaret Oyer, 35Lisa M Oyer, 37Kevin M Maraschin, 33Katherine W Maraschin, 54Katelyn Oyer, 41Margaret M Maraschin, 85Philip E Oyer, 81Katie OyerAnne Marie Maraschin, 61Chris Maraschin, 56
Connected to:
Mark W Marasch, 72Stephen A Marascia, 35Christine Marasco, 42Dorothy I Marasco, 91Francesca Marasco, 53Jon M Marasco, 67Louann A Marasco, 71Mart T Marasco, 42Paul Marasco, 64Rick D Marasco, 77

Robert Maraschin Phones & Addresses

  • 21629 Edward Way, Cupertino, CA 95014 (408) 253-5477
  • Woodside, CA

Interests

career opportunities, consulting offers,...

Industries

Mechanical or Industrial Engineering

Resumes

Resumes

Robert Maraschin Photo 1

Robert Maraschin

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Location:
San Francisco Bay Area
Industry:
Mechanical or Industrial Engineering

Publications

Us Patents

Low Contamination High Density Plasma Etch Chambers And Methods For Making The Same

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US Patent:
6394026, May 28, 2002
Filed:
Jan 19, 2000
Appl. No.:
09/487325
Inventors:
Thomas E. Wicker - Reno NE
Robert A. Maraschin - Cupertino CA
William S. Kennedy - Redwood Shores CA
Assignee:
LAM Research Corporation - Fremont CA
International Classification:
C23C 16507
US Classification:
118723AN, 118723 E, 118723 I, 15634543, 156916, 376150, 376136, 428594, 216 67
Abstract:
A plasma processing chamber having a chamber liner and a liner support, the liner support including a flexible wall configured to surround an external surface of the chamber liner, the flexible wall being spaced apart from the wall of the chamber liner. The apparatus can include a heater thermally connected to the liner support so as to thermally conduct heat from the liner support to the chamber liner. The liner support can be made from flexible aluminum material and the chamber liner comprises a ceramic material. The flexible wall can include slots which divide the liner support into a plurality of fingers which enable the flexible wall to absorb thermal stresses.

Semiconductor Processing Equipment Having Tiled Ceramic Liner

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US Patent:
6408786, Jun 25, 2002
Filed:
Sep 23, 1999
Appl. No.:
09/401193
Inventors:
William S. Kennedy - Redwood Shores CA
Robert A. Maraschin - Cupertino CA
Jerome S. Hubacek - Fremont CA
Assignee:
Lam Research Corporation - Fremont CA
International Classification:
C23C 16507
US Classification:
118723AN, 118724, 1563451
Abstract:
A plasma processing chamber including a ceramic liner in the form of ceramic tiles mounted on a resilient support member. The liner and other parts such as a gas distribution plate and a plasma screen can be made of SiC which advantageously confines the plasma and provides temperature control of the inner surfaces of the chamber. The liner can be heated by a heater which provides heat to the liner by thermal conduction. To remove excess heat from the liner, the resilient support can be an aluminum support frame which conducts heat from the liner to a temperature controlled member such as a top plate of the chamber. The support frame can include a continuous upper portion and a segmented lower portion which allows thermal stresses to be accommodated during processing of semiconductor substrates in the plasma chamber.

Contamination Controlling Method And Apparatus For A Plasma Processing Chamber

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US Patent:
6464843, Oct 15, 2002
Filed:
Aug 3, 1999
Appl. No.:
09/365885
Inventors:
Thomas E. Wicker - Reno NV
Alan M. Schoepp - Ben Lomond CA
Robert A. Maraschin - Cupertino CA
Assignee:
Lam Research Corporation - Fremont CA
International Classification:
C23C 1434
US Classification:
20419215, 20419235, 20429811, 20429807, 20429815, 20429831, 20429833, 156345, 216 67, 118721, 118723 I, 427569, 427585
Abstract:
A plasma processing chamber includes a substrate holder and a member of silicon carbide such as a liner, focus ring, perforated baffle or a gas distribution plate, the member having an exposed surface adjacent the substrate holder and the exposed surface being effective to minimize contamination during processing of substrates. The chamber can include an antenna which inductively couples RF energy through the gas distribution plate to energize process gas into a plasma state.

Low Contamination High Density Plasma Etch Chambers And Methods For Making The Same

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US Patent:
6583064, Jun 24, 2003
Filed:
Mar 21, 2002
Appl. No.:
10/101737
Inventors:
Thomas E. Wicker - Reno NV
Robert A. Maraschin - Cupertino CA
William S. Kennedy - Redwood Shores CA
Assignee:
Lam Research Corporation - Fremont CA
International Classification:
H01L 21461
US Classification:
438710, 438792, 438788, 438776, 438771, 438758, 15634548, 15634549, 118723 I, 427569
Abstract:
A plasma processing chamber having a chamber liner and a liner support, the liner support including a flexible wall configured to surround an external surface of the chamber liner, the flexible wall being spaced apart from the wall of the chamber liner. The apparatus can include a heater thermally connected to the liner support so as to thermally conduct heat from the liner support to the chamber liner. The liner support can be made from flexible aluminum material and the chamber liner comprises a ceramic material. The flexible wall can include slots which divide the liner support into a plurality of fingers which enable the flexible wall to absorb thermal stresses.

Apparatus And Method For Plating Semiconductor Wafers

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US Patent:
7645364, Jan 12, 2010
Filed:
Jun 30, 2004
Appl. No.:
10/882712
Inventors:
Yezdi N. Dordi - Palo Alto CA, US
Fred C. Redeker - Fremont CA, US
John M. Boyd - Atascadero CA, US
Robert Maraschin - Cupertino CA, US
Carl Woods - Aptos CA, US
Assignee:
Lam Research Corporation - Fremont CA
International Classification:
C25D 21/00
US Classification:
2042281, 204198
Abstract:
An electroplating apparatus for electroplating a surface of a wafer is provided. The wafer is capable of being electrically charged as a cathode. The electroplating apparatus includes a plating head capable of being positioned either over or under the surface of a wafer and capable of being electrically charged as an anode. The plating head is capable of enabling metallic plating between the surface of the wafer and the plating head when the wafer and plating head are charged. The plating head further comprises a voltage sensor pair capable of sensing a voltage present between the plating head and the surface of the wafer, and a controller capable of receiving data from the voltage sensor pair. The data received from the voltage sensor pair is used by the controller to maintain a substantially constant voltage to be applied by the anode when the plating head is placed in positions over the surface of the wafer. A method of electroplating a wafer is also provided.

Apparatus And Method For Semiconductor Wafer Electroplanarization

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US Patent:
7648616, Jan 19, 2010
Filed:
Mar 31, 2006
Appl. No.:
11/394777
Inventors:
John M. Boyd - Hillsboro OR, US
Fritz C. Redeker - Fremont CA, US
Yezdi Dordi - Palo Alto CA, US
Michael Ravkin - Sunnyvale CA, US
Robert Maraschin - Cupertino CA, US
Assignee:
Lam Research Corporation - Fremont CA
International Classification:
C25F 7/00
C25B 9/08
US Classification:
204252, 204295, 205640
Abstract:
A number of apertures are defined within a wall of a chamber defined to maintain an electrolyte solution. A cation exchange membrane is disposed within the chamber over the number of apertures. The electrolyte solution pressure within the chamber causes the cation exchange membrane to extend through the apertures beyond an outer surface of the chamber. A cathode is disposed within the chamber. The cathode is maintained at a negative bias voltage relative to a top surface of a wafer to be planarized. When the top surface of the wafer is brought into proximity of the cation exchange membrane extending through the apertures, and a deionized water layer is disposed between the top surface of the wafer and the cation exchange membrane, a cathode half-cell is established such that metal cations are liberated from the top surface of the wafer and plated on the cathode in the chamber.

Proximity Processing Using Controlled Batch Volume With An Integrated Proximity Head

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US Patent:
7811423, Oct 12, 2010
Filed:
Oct 6, 2006
Appl. No.:
11/539611
Inventors:
Carl A. Woods - Aptos CA, US
Yezdi N. Dordi - Palo Alto CA, US
Jacob Wylie - Fremont CA, US
Robert Maraschin - Cupertino CA, US
Assignee:
Lam Research Corporation - Fremont CA
International Classification:
C25D 17/00
US Classification:
204224R, 204225
Abstract:
A plating assembly for use in plating metallic materials onto a surface of a substrate is provided. The plating assembly comprising a delivery unit having a fluid chamber, a metallic source, and a porous insert. The plating assembly also comprising a receiving unit having a fluid chamber and a metallic receiver. The receiving unit also has a porous insert. The porous insert of the delivery unit being substantially aligned with, and spaced apart from, the porous insert of the receiving unit. The metallic receiver being substantially aligned with the porous insert of the delivery unit and a path being defined between the delivery unit and the receiving unit. Wherein a plating meniscus is capable of being defined in the path between the porous inserts of the delivery unit and the receiving unit and a substrate is capable of being moved through the plating meniscus to enable the plating of metallic materials onto the surface of the substrate. Examples for de-plating are also provided.

Apparatus For Plating Semiconductor Wafers

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US Patent:
7862693, Jan 4, 2011
Filed:
Sep 4, 2009
Appl. No.:
12/554860
Inventors:
Yezdi N. Dordi - Palo Alto CA, US
Fred C. Redeker - Fremont CA, US
John M. Boyd - Atascadero CA, US
Robert Maraschin - Cupertino CA, US
Carl Woods - Aptos CA, US
Assignee:
Lam Research Corporation - Fremont CA
International Classification:
C25D 21/12
C25D 19/00
C25B 15/00
US Classification:
2042281, 204198, 204216, 2042291, 204241
Abstract:
An electroplating apparatus for electroplating a surface of a wafer is provided. The wafer is capable of being electrically charged as a cathode. The electroplating apparatus includes a plating head capable of being positioned either over or under the surface of a wafer and capable of being electrically charged as an anode. The plating head is capable of enabling metallic plating between the surface of the wafer and the plating head when the wafer and plating head are charged. The plating head further comprises a voltage sensor pair capable of sensing a voltage present between the plating head and the surface of the wafer, and a controller capable of receiving data from the voltage sensor pair. The data received from the voltage sensor pair is used by the controller to maintain a substantially constant voltage to be applied by the anode when the plating head is placed in positions over the surface of the wafer. A method of electroplating a wafer is also provided.
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Robert A Maraschin from Cupertino, CA, age ~86 Get Report