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Peter N Ehlig

from Sugar Land, TX
Age ~71
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Also known as:
Peter Nelson Ehlig
Phone and address:
4010 Alcorn Bend Dr, Sugar Land, TX 77479
(281) 265-2344
Related to:
April E Economides, 49Michael J Economides, 75Peggy A Artripe, 73Victoria Ehlig, 42Victoria M Artripe, 42Robert Artripe, 43Linda Ehlig, 37Susan W Ehlig, 70Royce A Moore, 37C S
Connected to:
Amy C Ehlin, 55Joshua D Ehlin, 42Richard A Ehlin, 50Paul M Ehline, 78Jennifer L Ehling, 52Rebecca Ehling, 57Ladd P Ehlinger, 84Michelle L Ehlinger, 52Patrick J Ehlinger, 56Mary L Ehlis, 68

Peter Ehlig Phones & Addresses

  • 4010 Alcorn Bend Dr, Sugar Land, TX 77479 (281) 265-2344 (281) 265-6417
  • 3011 Barnhill Ln, Sugar Land, TX 77479 (281) 265-2344 (281) 265-6417
  • Stafford, TX
  • Houston, TX
  • Baytown, TX

Work

Position: Consultant

Education

Degree: Bachelors, Bachelor of Science In Electrical Engineering, Bachelor of Science School / High School: University of Houston 1972 to 1979 Specialities: Mathematics

Skills

Soc • Ic • Semiconductors • Cmos • Asic • Debugging • Mixed Signal • Semiconductor Industry • Digital Signal Processors • Processors • Analog • Memory Test • Vlsi • Silicon • Integrated Circuit Design • Power Management • Analog Circuit Design • Dft • Verilog • Microprocessors • Arm • Integrated Circuits • Leadership • Microarchitecture • Rtl Design • Low Power Design • Physical Design • Static Timing Analysis • Failure Analysis • System on A Chip • Very Large Scale Integration • Application Specific Integrated Circuits • Failure Modes • Visual Basic • Semiconductor Failure Analysis

Industries

Electrical/Electronic Manufacturing

Resumes

Resumes

Peter Ehlig Photo 1

Consultant

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Location:
P/O Box 1443, Houston, TX
Industry:
Electrical/Electronic Manufacturing
Work:

Consultant
Texas Instruments Oct 2002 - Oct 2008
Fellow
Texas Instruments Oct 1999 - Sep 2002
Distinguished Member Technical Staff
Education:
University of Houston 1972 - 1979
Bachelors, Bachelor of Science In Electrical Engineering, Bachelor of Science, Mathematics
Skills:
Soc
Ic
Semiconductors
Cmos
Asic
Debugging
Mixed Signal
Semiconductor Industry
Digital Signal Processors
Processors
Analog
Memory Test
Vlsi
Silicon
Integrated Circuit Design
Power Management
Analog Circuit Design
Dft
Verilog
Microprocessors
Arm
Integrated Circuits
Leadership
Microarchitecture
Rtl Design
Low Power Design
Physical Design
Static Timing Analysis
Failure Analysis
System on A Chip
Very Large Scale Integration
Application Specific Integrated Circuits
Failure Modes
Visual Basic
Semiconductor Failure Analysis

Publications

Us Patents

Processor Condition Sensing Circuits, Systems And Methods

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US Patent:
6546505, Apr 8, 2003
Filed:
Jul 1, 1999
Appl. No.:
09/346076
Inventors:
Gary L. Swoboda - Sugar Land TX
Peter N. Ehlig - Houston TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F 1130
US Classification:
714 30, 712227
Abstract:
A data processing device including a semiconductor chip, an electronic processor on-chip and an on-chip condition sensor connected to the electronic processor for analysis of the operations.

Volatile Memory Cell Reconfigured As A Non-Volatile Memory Cell

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US Patent:
6768669, Jul 27, 2004
Filed:
Sep 17, 2002
Appl. No.:
10/245163
Inventors:
James T. Schmidt - Houston TX
Joe F. Sexton - Houston TX
Peter N. Ehlig - Sugar Land TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G11C 1140
US Classification:
365154, 36518507, 36518508
Abstract:
A conventional volatile SRAM cell is modified into a non-volatile, read only memory cell. This permits a device whose design currently includes on-chip SRAM, but no ROM, to have non-volatile, read only memory with minimal redesign and development effort. The modifications made to the already present SRAM are fairly minimal resulting in much of the modified SRAM being largely unchanged. Because existing on chip, volatile memory is used largely as is with fairly minimal modifications to make the memory non-volatile, the time-to-market for such a device is much shorter than it would have been had the device been redesigned to include conventional ROM.

Ic With Wait State Registers

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US Patent:
6918025, Jul 12, 2005
Filed:
Jan 6, 2003
Appl. No.:
10/337028
Inventors:
Frederic Boutaud - Roquefort les Pihs, FR
Peter N. Ehlig - Houston TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F015/76
G06F012/02
G06F001/12
US Classification:
712 33, 712 36, 712 37, 712230, 711169, 711208, 711209, 713401
Abstract:
A data processing device is used with peripheral devices having addressees and differing communication response periods. The data processing device includes a digital processor adapted for selecting different ones of the peripheral devices by asserting addresses of each selected peripheral device. Addressable programmable registers hold wait state values representative of distinct numbers of wait states corresponding to different address ranges. Circuitry responsive to an asserted address to the peripheral devices asserted by the digital processor generates the number of wait states represented by the value held in one of the addressable programmable registers corresponding to the one of the address ranges in which the asserted address occurs, thereby accommodating the differing communication response periods of the peripheral devices.

Microphone/Speaker System With Context Switching In Processor

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US Patent:
6986142, Jan 10, 2006
Filed:
Sep 14, 2000
Appl. No.:
09/662228
Inventors:
Peter N. Ehlig - Houston TX, US
Frederic Boutaud - Roquefort les Pins, FR
James F. Hollander - Dallas TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F 9/46
US Classification:
718108, 712228, 704200
Abstract:
A data processing device includes an electronic processor responsive to a context signal and operable in alternative processing contexts identified by the context signal. First and second registers are connected to the electronic processor to participate in one processing context while retaining information from another processing context until a return thereto. A context switching circuit is connected to the first and second registers and operates to selectively control input and output operations of the registers to and from the electronic processor depending on the processing context. Other devices, systems and methods are also disclosed.

Program Counter Trace Stack, Access Port, And Serial Scan Path

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US Patent:
6996747, Feb 7, 2006
Filed:
Jan 7, 2003
Appl. No.:
10/337568
Inventors:
Gary L. Swoboda - Sugar Land TX, US
Peter N. Ehlig - Houston TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F 11/267
US Classification:
714 30
Abstract:
A data processing device including a semiconductor chip, an electronic processor on-chip and an on-chip condition sensor connected to the electronic processor for analysis of the operations.

Devices, Systems And Methods For Conditional Instructions

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US Patent:
20050251638, Nov 10, 2005
Filed:
Dec 21, 2004
Appl. No.:
11/019875
Inventors:
Frederic Boutaud - Roquefort les Pins, FR
Peter Ehlig - Houston TX, US
International Classification:
G06F012/00
US Classification:
711167000
Abstract:
A data processing device includes a circuit having status conditions wherein a particular set of the status conditions can occur in operation of the circuit. An instruction register operates to hold a branch instruction conditional on a particular set of the status conditions. A decoder is connected to the instruction register and the circuit. A program counter is coupled to the decoder wherein the decoder is operable to enter a branch address into the program counter in response to the branch instruction when the particular set of the status conditions of the circuit are present. Other data processing devices, systems and methods are also disclosed.

Context Switching Devices, Systems And Methods

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US Patent:
20050278512, Dec 15, 2005
Filed:
Apr 26, 2005
Appl. No.:
11/115756
Inventors:
Peter Ehlig - Houston TX, US
Frederic Boutaud - Roquefort les Pins, FR
James Hollander - Dallas TX, US
International Classification:
G06F015/00
US Classification:
712228000
Abstract:
A data processing device includes an electronic processor responsive to a context signal and operable in alternative processing contexts identified by the context signal. First and second registers are connected to the electronic processor to participate in one processing context while retaining information from another processing context until a return thereto. A context switching circuit is connected to the first and second registers and operates to selectively control input and output operations of the registers to and from the electronic processor depending on the processing context. Other devices, systems and methods are also disclosed.

Processor Condition Sensing Circuits, Systems And Methods

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US Patent:
20060059387, Mar 16, 2006
Filed:
May 11, 2005
Appl. No.:
11/127946
Inventors:
Gary Swoboda - Sugar Land TX, US
Peter Ehlig - Houston TX, US
International Classification:
G06F 11/00
US Classification:
714030000
Abstract:
A data processing device including a semiconductor chip, an electronic processor on-chip and an on-chip condition sensor connected to the electronic processor for analysis of the operations.
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Peter N Ehlig from Sugar Land, TX, age ~71 Get Report