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Paul G Murtagh

from Studio City, CA
Age ~56

Paul Murtagh Phones & Addresses

  • 11610 Dona Alicia Pl, Studio City, CA 91604 (818) 509-0465
  • Los Angeles, CA
  • San Mateo, CA
  • Encino, CA
  • El Cerrito, CA
  • Boston, MA

Work

Address: 633 West 5Th Street, 28Th Fl., Los Angeles, CA 90071 Specialities: Litigation - 100%

Education

Degree: law School / High School: UC Hastings - Suffolk Univ Law School

Ranks

Licence: California - Active Date: 1996

Specialities

Business Litigation • Appellate Law • Trade Secret Litigation • Professional Liability Litigation • Insurance and Reinsurance Litigation • Real Estate Litigation • Securities Litigation • Employment Litigation • Litigation

Professional Records

Lawyers & Attorneys

Paul Murtagh Photo 1

Paul G Murtagh, Los Angeles CA - Lawyer

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Address:
633 West 5Th Street, 28Th Fl., Los Angeles, CA 90071
(213) 223-2335 (Office), (213) 947-1598 (Fax)
Licenses:
California - Active 1996
Experience:
Principal at Murtagh & Associates - 2005-present
Attorney at Stephan Oringher Richman & Theodora, P.C. - 1999-2005
Attorney at Cummins & White LLP - 1998-1999
Judicial Extern at Supreme Court of California - Chambers of Joyce L. Kennard - 1995
Education:
UC Hastings - Suffolk Univ Law School
Degree - law
Graduated - 1995
Univ of California Berkeley
Degree - undergraduate
Specialties:
Litigation - 100%, 27 years, 400 cases
Associations:
San Fernando Valley Bar Association, 2009-present
American Bar Association, 1996-present
Los Angeles Bar Association, 1996-present
Paul Murtagh Photo 2

Paul Murtagh - Lawyer

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Office:
Murtagh & Associates
Specialties:
Business Litigation
Appellate Law
Trade Secret Litigation
Professional Liability Litigation
Insurance and Reinsurance Litigation
Real Estate Litigation
Securities Litigation
Employment Litigation
Litigation
ISLN:
911396278
Admitted:
1996
University:
University of California, Berkeley, A.B., 1991
Law School:
Suffolk University School of Law, J.D., 1995

Resumes

Resumes

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Vice President Of Analog Design

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Location:
Los Angeles, CA
Industry:
Semiconductors
Work:
Eta Compute
Vice President of Analog Design

Inphi Corporation May 2007 - Aug 2015
Principal Engineer

Idt - Integrated Device Technology, Inc. Apr 1999 - May 2007
Principal Engineer

Quality Semiconductor Australia Jun 1996 - Apr 1999
Senior Design Engineer
Education:
The University of Queensland 1992 - 1995
Doctorates, Doctor of Philosophy, Electrical Engineering
The University of Queensland 1990 - 1992
The University of Queensland 1986 - 1989
Bachelor of Engineering, Bachelors, Electrical Engineering
Skills:
Mixed Signal
Cmos
Semiconductors
Ic
Circuit Design
Pll
Asic
Serdes
Eda
Soc
Analog Circuit Design
Analog
Integrated Circuit Design
Signal Integrity
Physical Design
Verilog
Spectre
Fpga
Debugging
Rtl Design
Languages:
English
Paul Murtagh Photo 4

Paul Murtagh

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Location:
Los Angeles, CA
Industry:
Law Practice
Work:
Murtagh & Associates
Skills:
Litigation
Courts
Torts
Complex Litigation
Trade Secrets
Civil Litigation
Insurance
Commercial Litigation
Product Liability
Business Litigation
Legal Research
Trials
Westlaw
Hearings
Mediation
Legal Writing
Appellate Practice
Appeals
Pleadings
Unfair Competition
Class Actions
Intellectual Property
Arbitration
Personal Injury
Breach of Contract
Paul Murtagh Photo 5

Paul Murtagh

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Paul Murtagh Photo 6

Paul Murtagh

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Paul Murtagh Photo 7

Paul Murtagh

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Location:
United States

Business Records

Name / Title
Company / Classification
Phones & Addresses
Paul Murtagh
Owner
Gael Force Construction
Single-Family House Construction · Home Builders
831 Beechwood Dr, Daly City, CA 94015
(650) 731-8093
Paul Murtagh
Executive
Murtagh Associates
Legal Services Office
10 Universal City Plz, North Hollywood, CA 91608
(818) 753-2323
Paul Murtagh
Attorney
Theodora & Miller, A P Corporation
Legal Services Office
2029 Century Park E, Los Angeles, CA 90067
(310) 557-2009

Publications

Us Patents

Synchronizing A Self-Timed Processor With An External Event

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US Patent:
20190097634, Mar 28, 2019
Filed:
Sep 14, 2018
Appl. No.:
16/132187
Inventors:
- Westlake Village CA, US
Paul Murtagh - Westlake Village CA, US
International Classification:
H03K 19/096
H03K 19/00
H03K 19/20
Abstract:
There is disclosed a self-timed processor. The self-timed processor includes trigger logic having a trigger input to receive an event trigger signal, a data input set to data value 1, a trigger output to send a trigger output signal when the event trigger signal is received, and a reset input to reset the trigger output signal. The processor also has a delay insensitive asynchronous logic (DIAL) block with multi-rail DIAL inputs to receive a multi-rail DIAL input having a) the trigger output signal, and b) data value 0; and data phase completion logic to output a completion signal indicating an end of a data propagate phase of the DIAL block to reset the trigger output signal when multi-rail data DIAL data process values of the DIAL block reach a DIAL valid state.

Frequency-Controlled Voltage Source

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US Patent:
20180254698, Sep 6, 2018
Filed:
Feb 1, 2018
Appl. No.:
15/886056
Inventors:
- Westlake Village CA, US
Paul Murtagh - Westlake Village CA, US
International Classification:
H02M 3/07
H03K 5/14
G06F 15/82
Abstract:
Voltage source circuits, asynchronous processing systems and methods are disclosed. A voltage source circuit includes a capacitor storing an operating voltage for an asynchronous processor. A frequency comparator compares a frequency reference and a feedback signal indicative of an operating frequency of the asynchronous processor to determine whether or not the operating frequency is less than a target frequency. When operating frequency is less than the target frequency, a charge pump adds charge to the capacitor.
Paul G Murtagh from Studio City, CA, age ~56 Get Report