Para K Segaram

6775328, Aug 10, 2004

Aug 11, 1999

09/372319

Para K. Segaram - Campbell CA

Rambus Inc. - Los Altos CA

H04B 300

375257, 375219, 375354, 710 61

In a communications device having a physical layer device and a processing device connected to the physical layer device, the number of input/output (I/O) ports required for communication between the devices in the gigabit range is substantially reduced by utilizing millivolt differential I/O drivers and receivers. In addition, a calibration feedback loop synchronizes the data and clock signals on the processing device, thereby eliminating the need to recover the clock on the processing device.

6884120, Apr 26, 2005

Jun 27, 2003

10/608255

Belgacem Haba - Cupertino CA, US
Para Segaram - Campbell CA, US
Joseph C. Fjelstad - Maple Valley CA, US

SiliconPipe, Inc. - San Jose CA

H01R024/00

439630

A connector is described which uses a coupling structure integrally formed from a plurality of discrete elements that are aligned to receive an insertion force. In response to the insertion force affecting some or all of the elements, the affected elements move from an original state into a deflected state. In the deflected state, the overall thickness of the coupling structure is reduced. The relationship between the coupling structure and a dimension of a cavity that is to be occupied by the coupling structure is such that when the thickness of the coupling structure is reduced, the dimension of the cavity is increased.

6933610, Aug 23, 2005

Feb 19, 2003

10/370422

Para Kanagasabai Segaram - Campbell CA, US
Joseph Fjelstad - Maple Valley WA, US
Belgacem Haba - Cupertino CA, US

Silicon Pipe, Inc. - San Jose CA

H01L029/72

257778, 257723, 257672, 257173, 438110, 438 14, 438 15

In a semiconductor device having a semiconductor die without an ESD circuit and a separate ESD circuit and an external lead, the external lead is first bonded to the separate ESD circuit. Thereafter, the separate ESD circuit is bonded to the semiconductor die. As a result, in the process of bonding the semiconductor die, any ESD disturbance is absorbed by the ESD circuit. In addition, a semiconductor device such as a DDR DRAM memory device, has a chip carrier with a first surface having a plurality of leads and a second surface opposite to it with an aperture between them. A semiconductor die with a mounting surface and a bonding pad faces the second surface with the bonding pad in the aperture. An ESD circuit is mounted on the mounting surface in the aperture. A first electrical connector connects one of a plurality of leads to the ESD circuit and a second electrical connector connects the ESD circuit to the bonding pad.

7014472, Mar 21, 2006

Jan 13, 2004

10/756924

Joseph C. Fjelstad - Maple Valley CA, US
Para Segaram - Campbell CA, US
Thomas Obenhuber - San Francisco CA, US
Gary Yasumura - Santa Clara CA, US

SiliconPipe, Inc. - San Jose CA

H01R 12/00
H05K 1/00

439 65, 439637

A device module may be used to carry a plurality of devices, such as memory devices or other components. The device module may include a board, a first set of contact points, and a second set of contact points. A plurality of signal paths may be provided on the board, where each signal path extends between a contact point in the first set and a contact point in the second set. Each of the plurality of signal paths has substantially an identical length and a same number of turns on the board.

7039118, May 2, 2006

Jan 16, 2001

09/761211

Para K. Segaram - Campbell CA, US

Rambus Inc. - Los Altos CA

H04B 3/00
H04L 25/00

375257, 375354

In a communications device having a physical layer device and a processing device connected to the physical layer device, the number of input/output (I/O) ports required for communication between the devices in the gigabit range is substantially reduced by utilizing millivolt differential I/O drivers and receivers. In addition, a calibration feedback loop synchronizes the data and clock signals on the processing device, thereby eliminating the need to recover the clock on the processing device.

7092449, Aug 15, 2006

Apr 1, 2004

10/814625

Para K. Segaram - Campbell CA, US

Rambus Inc. - Los Altos CA

H04B 3/00
H04L 25/00

375257, 375219, 375354, 710 61

In a communications device having a physical layer device and a processing device connected to the physical layer device, the number of input/output (I/O) ports required for communication between the devices in the gigabit range is substantially reduced by utilizing millivolt differential I/O drivers and receivers. In addition, a calibration feedback loop synchronizes the data and clock signals on the processing device, thereby eliminating the need to recover the clock on the processing device.

7111108, Sep 19, 2006

Apr 12, 2004

10/823499

Kevin P. Grundy - Fremont CA, US
Para K. Segaram - Cupertino CA, US

Silicon Pipe, Inc. - San Jose CA

G06F 12/00

711100, 710305, 370431, 370538

A memory system having a memory controller, interface device and plurality of memory elements. The interface device is coupled to the memory controller via a first high-speed signal path. The plurality of memory elements are removably coupled to the interface device via respective second signal paths, each of the second signal paths having a lower signaling bandwidth than the first signaling path.

7307293, Dec 11, 2007

Apr 29, 2003

10/426930

Joseph C. Fjelstad - Maple Valley WA, US
Para K. Segaram - Campbell CA, US
Belgacem Haba - Cupertino CA, US

Silicon Pipe, Inc. - San Jose CA

H01L 31/0336
H05K 3/22
H05K 1/00
H01R 12/00

257200, 257E23004, 257E23068, 257E23172, 257E25011, 257723, 257728, 257700, 257701, 257758, 257786, 257777, 257698, 257691, 257685, 257208, 257207, 257203, 257211, 439581, 174268, 174110 R, 174 78, 174 36, 174251, 333246, 333238, 333260

A direct-connect signaling system including a printed circuit board and first and second integrated circuit packages disposed on the printed circuit board. A plurality of electric signal conductors extend between the first and second integrated circuit packages suspended above the printed circuit board.