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Olof Gustaf Tornblad

from San Jose, CA
Age ~57
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Also known as:
Olof G Tornblad, Olof Gusta Tornblad
Phone and address:
1521 Willowdale Dr, San Jose, CA 95118
(408) 930-6473
Connected to:
Carl Tornblom, 45Emily D Tornblom, 49Molly M Tornblom, 29Christel D Torneden, 58Lisa R Torneden, 73Arundhati Tornekar, 47Aaron Tornell, 63Henry J Tornell, 83Michael N Tornello, 42Michelle Tornello, 50

Olof Tornblad Phones & Addresses

  • 1521 Willowdale Dr, San Jose, CA 95118 (408) 930-6473
  • Los Gatos, CA
  • Mountain View, CA
  • 1521 Willowdale Dr, San Jose, CA 95118

Work

Company: Vishay siliconix Aug 2010 Position: Sr. staff device engineer

Education

Degree: PhD School / High School: KTH Royal Institute of Technology 1992 to 1998 Specialities: Semiconductor device physics

Skills

Semiconductors • Simulations • Semiconductor Device • Tcad • Ic • Modeling • Analog • Analog Circuit Design • Mixed Signal • Characterization • Circuit Design • Mems • Design of Experiments • Semiconductor Process Technology • Power Devices • Rf • Cmos • Electronics • Integrated Circuits • Radio Frequency • Testing

Languages

English

Industries

Semiconductors

Resumes

Resumes

Olof Tornblad Photo 1

R And D Modeling Manager

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Location:
1521 Willowdale Dr, San Jose, CA 95118
Industry:
Semiconductors
Work:
Vishay Siliconix since Aug 2010
Sr. Staff Device Engineer
Infineon Technologies Sep 2002 - Aug 2010
Sr. Staff Engineer
Ericsson Microelectronics Oct 2000 - Sep 2002
Research Engineer
Stanford University Jan 1999 - Oct 2000
Postdoc researcher
Education:
KTH Royal Institute of Technology 1992 - 1998
PhD, Semiconductor device physics Rheinisch-Westfälische Technische Hochschule Aachen 1990 - 1991
study exchange (M.Sc.), Physics
Skills:
Semiconductors
Simulations
Semiconductor Device
Tcad
Ic
Modeling
Analog
Analog Circuit Design
Mixed Signal
Characterization
Circuit Design
Mems
Design of Experiments
Semiconductor Process Technology
Power Devices
Rf
Cmos
Electronics
Integrated Circuits
Radio Frequency
Testing
Languages:
English

Publications

Us Patents

Ldmos Device

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US Patent:
7626233, Dec 1, 2009
Filed:
Apr 23, 2007
Appl. No.:
11/738603
Inventors:
Olof Tornblad - Los Gatos CA, US
Gordon Ma - Phoenix AZ, US
Assignee:
Infineon Technologies AG - Neubiberg
International Classification:
H01L 29/94
H01L 29/76
US Classification:
257343, 257335, 257339, 257E29027, 438197
Abstract:
An LDMOS transistor comprises source, channel and extended drain regions. The extended drain region comprises a plurality of islands that have a conductivity type that is opposite to the extended drain region. The islands have a depth less than a depth of the extended drain region.

Ldmos Transistor

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US Patent:
20050073003, Apr 7, 2005
Filed:
Oct 3, 2003
Appl. No.:
10/678837
Inventors:
Olof Tornblad - Los Gatos CA, US
Gordon Ma - Phoenix AZ, US
International Classification:
H01L029/76
US Classification:
257336000
Abstract:
A semiconductor transistor structure comprises a substrate having an epitaxial layer, a source region extending from the surface of the epitaxial layer, a drain region within the epitaxial layer, a channel located between the drain and source regions, and a gate arranged above the channel. The drain region comprises a first region for establishing a contact with an electrode, a second region being less doped than the first region being buried within the epitaxial layer and extending from the first region horizontally in direction towards the gate, a third region less doped than the second region and extending vertically from the surface of the epitaxial layer and horizontally from the second region until under the gate, a top layer extending from the surface of the epitaxial layer to the second region, and a bottom layer extending from the second region into the epitaxial layer.

Modulated Super Junction Power Mosfet Devices

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US Patent:
20180240869, Aug 23, 2018
Filed:
Feb 6, 2018
Appl. No.:
15/889784
Inventors:
- Santa Clara CA, US
Olof TORNBLAD - San Jose CA, US
International Classification:
H01L 29/06
H01L 29/78
H01L 29/10
Abstract:
A semiconductor device—e.g., a super junction power MOSFET—includes a number of columns of one type of dopant formed in a region of another type of dopant. Generally speaking, the columns are modulated in some manner. For example, the widths (e.g., diameters) of some columns are greater than the widths of other columns.

Modulated Super Junction Power Mosfet Devices

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US Patent:
20150372078, Dec 24, 2015
Filed:
Mar 16, 2015
Appl. No.:
14/659394
Inventors:
- Santa Clara CA, US
Olof TORNBLAD - San Jose CA, US
International Classification:
H01L 29/06
H01L 29/78
Abstract:
A semiconductor device—e.g., a super junction power MOSFET—includes a number of columns of one type of dopant formed in a region of another type of dopant. Generally speaking, the columns are modulated in some manner. For example, the widths (e.g., diameters) of some columns are greater than the widths of other columns.
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Olof Gustaf Tornblad from San Jose, CA, age ~57 Get Report