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Michael G Shlepr

from Palm Bay, FL
Age ~62

Michael Shlepr Phones & Addresses

  • 2679 Yalta St, Palm Bay, FL 32905 (321) 768-0404
  • 325 University Blvd, Melbourne, FL 32901
  • 1059 N Pebble Ridge Rd, Greenville, WI 54942 (920) 757-0378
  • 385 Lopas St, Menasha, WI 54952 (920) 725-3446
  • Berrien Ctr, MI
  • Little Rock, AR
  • N1059 Pebble Ridge Rd, Greenville, WI 54942 (920) 757-0378

Work

Position: Homemaker

Education

Degree: High school graduate or higher

Emails

v***r@new.rr.com

Business Records

Name / Title
Company / Classification
Phones & Addresses
Michael Shlepr
Director
University Package Store, Inc
1555 N Hwy A1A, Melbourne, FL 32903
1555 N A1A, Melbourne, FL 32903

Publications

Us Patents

Bonded Substrate For An Integrated Circuit Containing A Planar Intrinsic Gettering Zone

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US Patent:
6825532, Nov 30, 2004
Filed:
May 1, 2001
Appl. No.:
09/846795
Inventors:
Jack H. Linn - Melbourne FL
William H. Speece - Palm Bay FL
Michael G. Shlepr - Palm Bay FL
George V. Rouse - Indialantic FL
Assignee:
Intersil Americas Inc. - Milpitas CA
International Classification:
H01L 2701
US Classification:
257347, 438455, 438458, 438474, 438977
Abstract:
A bonded semiconductor-on-insulator substrate for an integrated circuit. The bonded semiconductor-on-insulator substrate includes a wafer, a handle wafer and an insulating bond layer. The wafer has a first layer of monocrystalline semiconductor material adjacent a first surface of the wafer. The wafer also has a second layer of undamaged by implantation monocrystalline semiconductor material adjacent a second surface of the wafer. The wafer further has a substantially planar intrinsic gettering zone of substantially pure semiconductor material and active gettering sites positioned between the first and second layers formed by implanting ions of the semiconductor material through the first layer of monocrystalline semiconductor material. The insulating bond layer bonds the handle wafer to the first surface of the wafer.

Bonded Substrate For An Integrated Circuit Containing A Planar Intrinsic Gettering Zone

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US Patent:
7052973, May 30, 2006
Filed:
Mar 29, 2004
Appl. No.:
10/811617
Inventors:
Jack H. Linn - Melbourne FL,
William H. Speece - Palm Bay FL,
Michael G. Shlepr - Palm Bay FL,
George V. Rouse - Indialantic FL,
Assignee:
Intersil Americas Inc. - Milpitas CA
International Classification:
H01L 21/46
H01L 21/30
US Classification:
438455, 438473
Abstract:
A bonded semiconductor-on-insulator substrate for an integrated circuit. The bonded semiconductor-on-insulator substrate includes a wafer, a handle wafer and an insulating bond layer. The wafer has a first layer of monocrystalline semiconductor material adjacent a first surface of the wafer. The wafer also has a second layer of undamaged by implantation monocrystalline semiconductor material adjacent a second surface of the wafer. The wafer further has a substantially planar intrinsic gettering zone of substantially pure semiconductor material and active gettering sites positioned between the first and second layers formed by implanting ions of the semiconductor material through the first layer of monocrystalline semiconductor material. The insulating bond layer bonds the handle wafer to the first surface of the wafer.

Method For Forming A Bonded Substrate Containing A Planar Intrinsic Gettering Zone And Substrate Formed By Said Method

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US Patent:
62551957, Jul 3, 2001
Filed:
Feb 22, 1999
Appl. No.:
9/255231
Inventors:
Jack H. Linn - Melbourne FL
William H. Speece - Palm Bay FL
Michael G. Shlepr - Palm Bay FL
George V. Rouse - Indialantic FL
Assignee:
Intersil Corporation - Palm Bay FL
International Classification:
H01L 2130
H01L 2146
H01L 21322
H01L 2120
H01L 2136
US Classification:
438455
Abstract:
In a method for forming a bonded semiconductor-on-insulator substrate for the fabrication of semiconductor devices and integrated circuits, a surface of a wafer of a monocrystalline semiconductor material is implanted with ions of the semiconductor material a to a selected depth in the wafer to form, adjacent to the surface, an amorphous layer of the semiconductor material. The layer of amorphous semiconductor material extends to a substantially planar zone disposed at substantially the selected depth and comprising the monocrystalline semiconductor material damaged by lattice defects, i. e. , end-of-range implant damage. Undamaged material below the selected depth comprises a first layer of the monocrystalline semiconductor material. The wafer is heated under conditions effective to convert the amorphous layer to a second layer of the monocrystalline semiconductor material and to coalesce the zone of damaged monocrystalline semiconductor material, thereby forming a substantially planar intrinsic gettering zone of substantially pure semiconductor material that includes active gettering sites disposed at substantially the selected depth. An insulating bond layer on one surface of a handle wafer is bonded to the surface of the wafer to form a bonded semiconductor-on-insulator substrate comprising a handle wafer, an insulating bond layer, and a device wafer of monocrystalline semiconductor material.
Michael G Shlepr from Palm Bay, FL, age ~62 Get Report