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Martha E Voytovich

from Rochester, MN
Age ~46
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Related to:
Sandra E Voytovich, 49Mary A Voytovich, 74Katherine M Voytovich, 52Sam P Voytovich
Connected to:
Julia Voytovich, 30Steven J Voytovich, 51Peter Voyvodic, 39Lisa R Voyzey, 53Paul Vozar, 67Robin M Vozar, 64George H Vozari, 99Luba Vozarova, 65Kay C Vozel, 60Julia C Vozella, 28

Martha Voytovich Phones & Addresses

  • 5127 25Th Ave NW, Rochester, MN 55901
  • 2715 56Th St, Rochester, MN 55901 (507) 536-4972
  • 2715 56Th St NW #C, Rochester, MN 55901 (507) 536-4972
  • Eau Claire, WI

Work

Company: Ibm Aug 2001 Position: Logic designer

Education

Degree: Bachelors, Bachelor of Science School / High School: University of Wisconsin - Madison Specialities: Electronics Engineering

Skills

Verilog • Logic Design • Vhdl • Functional Verification • Asic • Microprocessors • Static Timing Analysis • Perl • Computer Architecture • Debugging • Hardware Architecture • Processors • Soc • Fpga • C++ • Timing Closure • Ncsim • Electrical Engineering • Computer Hardware • Powerpc • Rtl Design

Industries

Information Technology And Services

Resumes

Resumes

Martha Voytovich Photo 1

Logic Designer

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Location:
Rochester, MN
Industry:
Information Technology And Services
Work:
Ibm
Logic Designer
Education:
University of Wisconsin - Madison
Bachelors, Bachelor of Science, Electronics Engineering
Skills:
Verilog
Logic Design
Vhdl
Functional Verification
Asic
Microprocessors
Static Timing Analysis
Perl
Computer Architecture
Debugging
Hardware Architecture
Processors
Soc
Fpga
C++
Timing Closure
Ncsim
Electrical Engineering
Computer Hardware
Powerpc
Rtl Design

Publications

Us Patents

Method And Apparatus For Tracking Cached Addresses For Maintaining Cache Coherency In A Computer System Having Multiple Caches

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US Patent:
7788452, Aug 31, 2010
Filed:
Jan 20, 2004
Appl. No.:
10/760431
Inventors:
Duane Arlyn Averill - Rochester MN, US
Russell Dean Hoover - Rochester MN, US
David Alan Shedivy - Rochester MN, US
Martha Ellen Voytovich - Rochester MN, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 13/00
G06F 15/76
US Classification:
711141, 711119, 712 28
Abstract:
A computer system includes multiple caches and a cache line state directory structure, having at least a portion dedicated to a particular device cache within a particular device, and contains a fixed number of entries having a one-to-one correspondence to the cache lines of the cache to which it corresponds. The cache line state directory is used to determine whether it is necessary to send an invalidation message to the device cache. In the preferred embodiment, a dedicated portion of the cache line state directory structure corresponds to an I/O bridge device cache. Preferably, the cache line state directory also maintains state for one or more processor caches in a different format. The computer system preferably uses a NUMA architecture, the directories being maintained by node servers in each node.

Self-Healing Link Sequence Counts Within A Circular Buffer

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US Patent:
7978705, Jul 12, 2011
Filed:
Nov 19, 2008
Appl. No.:
12/274228
Inventors:
Robert A. Shearer - Rochester MN, US
Martha E. Voytovich - Rochester MN, US
Craig A. Wigglesworth - Cary NC, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H04L 12/66
H04L 12/56
G06F 13/00
US Classification:
370394, 370352, 370397, 37039553, 370474, 710 20, 710 36, 710 40, 710 53, 710 56
Abstract:
Methods and apparatus that allow recovery in the event that sequence counts used on receive and transmit sides of a communications link become out of sync are provided. In response to receiving a packet with an expected sequence count from a receiving device, a transmitting device may adjust pointers into a transmit buffer allowing the transmitting device to begin transmitting packets with the sequence count expected by the receiving device.

Link Retry Per Virtual Channel

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US Patent:
20060140122, Jun 29, 2006
Filed:
Dec 28, 2004
Appl. No.:
11/023707
Inventors:
Robert Shearer - Rochester MN, US
Martha Voytovich - Rochester MN, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H04L 1/00
US Classification:
370236000
Abstract:
Methods and apparatus that allow lost packets on one virtual channel to be retried without requiring all subsequently issued packets, sent over other virtual channels, to be retried. In other words, packet retries may be performed on a “per virtual channel” basis. As a result, other virtual channels, not experiencing lost packets, may not suffer reductions in their bandwidth due to a lost packet occurring on another virtual channel.

Self-Healing Link Sequence Counts Within A Circular Buffer

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US Patent:
20060140188, Jun 29, 2006
Filed:
Dec 28, 2004
Appl. No.:
11/023708
Inventors:
Robert Shearer - Rochester MN, US
Martha Voytovich - Rochester MN, US
Craig Wigglesworth - Cary NC, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H04L 12/28
US Classification:
370394000
Abstract:
Methods and apparatus that allow recovery in the event that sequence counts used on receive and transmit sides of a communications link become out of sync are provided. In response to receiving a packet with an expected sequence count from a receiving device, a transmitting device may adjust pointers into a transmit buffer allowing the transmitting device to begin transmitting packets with the sequence count expected by the receiving device.
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Martha E Voytovich from Rochester, MN, age ~46 Get Report