US Patent:
20220261351, Aug 18, 2022
Inventors:
- Santa Clara CA, US
Venkata Krishnan - Ashland MA, US
Andrew J. Herdrich - Hillsboro OR, US
Ren Wang - Portland OR, US
Robert G. Blankenship - Tacoma WA, US
Vedaraman Geetha - Fremont CA, US
Shrikant M. Shah - Chandler AZ, US
Marshall A. Millier - Banks OR, US
Raanan Sade - Haifa, IL
Binh Q. Pham - Hillsboro OR, US
Olivier Serres - Hudson MA, US
Christopher B. Wilkerson - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 12/0868
G06F 12/0897
G06F 3/06
G06F 12/0811
G06F 12/0871
Abstract:
Method and system for performing data movement operations is described herein. One embodiment of a method includes: storing data for a first memory address in a cache line of a memory of a first processing unit, the cache line associated with a coherency state indicating that the memory has sole ownership of the cache line; decoding an instruction for execution by a second processing unit, the instruction comprising a source data operand specifying the first memory address and a destination operand specifying a memory location in the second processing unit; and responsive to executing the decoded instruction, copying data from the cache line of the memory of the first processing unit as identified by the first memory address, to the memory location of the second processing unit, wherein responsive to the copy, the cache line is to remain in the memory and the coherency state is to remain unchanged.