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Markus Liebhard Phones & Addresses

  • Benicia, CA
  • 2972 Sunrise Dr, Napa, CA 94558 (707) 224-1612
  • 12 Skylark Ct, Napa, CA 94558 (707) 224-1612
  • Pittsburgh, PA
  • Chandler, AZ
  • Oakland, CA
  • Gilbert, AZ
  • Phoenix, AZ
  • 3952 Canon Ave, Oakland, CA 94602

Work

Position: Protective Service Occupations

Education

Degree: Associate degree or higher

Publications

Us Patents

Semiconductor Package With Warpage Resistant Substrate

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US Patent:
6486537, Nov 26, 2002
Filed:
Mar 19, 2001
Appl. No.:
09/812426
Inventors:
Markus K. Liebhard - Gilbert AZ
Assignee:
Amkor Technology, Inc. - Chandler AZ
International Classification:
H01L 23495
US Classification:
257667, 257666, 257669, 257787, 257737, 257780, 257738, 257701, 257713
Abstract:
A semiconductor package and a method for fabricating a semiconductor package are disclosed. The semiconductor package includes semiconductor chip attached to a circuit board that includes at least one lateral slot formed through the circuit board. Provision of the slot reduces stresses in the circuit board that are manifested by warpage. The semiconductor chip may be positioned in a central aperture of the circuit board and held therein by hardened encapsulant material.

Chip Size Image Sensor In Wirebond Package With Step-Up Ring For Electrical Contact

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US Patent:
6509560, Jan 21, 2003
Filed:
Nov 13, 2000
Appl. No.:
09/711993
Inventors:
Thomas P. Glenn - Gilbert AZ
Steven Webster - Chandler AZ
Markus K. Liebhard - Chandler AZ
Assignee:
Amkor Technology, Inc. - Chandler AZ
International Classification:
H01J 4014
US Classification:
250239, 2502141, 361783, 257688
Abstract:
An image sensor package includes an image sensor having an upper surface. The image sensor further includes an active area and bond pads on the upper surface. A window is supported above the active area by a window support. A step up ring is mounted above a noncritical region of the upper surface of the image sensor between the active area and the bond pads. Electrically conductive traces on the step up ring are electrically connected to the bond pads by bond wires. An inner package body is formed between the step up ring and the window support and mechanically locks the window in place. An outer package body is formed to enclose the bond wires, the bond pads, and outer sides of the step up ring. The outer package body has outer sides coplanar with sides of the image sensor such that the image sensor assembly is chip size.

Low Profile Mounting Of Thick Integrated Circuit Packages Within Low-Profile Circuit Modules

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US Patent:
6509637, Jan 21, 2003
Filed:
Mar 8, 2002
Appl. No.:
10/094731
Inventors:
Markus Karl Liebhard - Chandler AZ
Assignee:
Amkor Technology, Inc. - Chandler AZ
International Classification:
H01L 2302
US Classification:
257678, 257704, 257666
Abstract:
An assembly and method for mounting thick integrated circuit packages within a low-profile circuit module provides a low cost alternative to special integrated circuit packaging requirements. Pre-packaged thin-small-outline-packages (TSOP), thin-plastic-quad-flatpack (TQFP) and other similar surface mount packages may be used within a low-profile circuit module, using the techniques and structures of the present invention. A straight lead package is mounted within a cavity in the circuit module substrate, so that the effective height of the integrated circuit package is reduced. Curved lead packages are used by straightening or sawing the leads before mounting.

Chip Size Image Sensor Bumped Package

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US Patent:
6528857, Mar 4, 2003
Filed:
Nov 13, 2000
Appl. No.:
09/712313
Inventors:
Thomas P. Glenn - Gilbert AZ
Steven Webster - Chandler AZ
Markus K. Liebhard - Chandler AZ
Assignee:
Amkor Technology, Inc. - Chandler AZ
International Classification:
H01L 31203
US Classification:
257433, 257432, 257434, 257789, 361783, 438116
Abstract:
An image sensor package includes an image sensor having an upper surface. The image sensor further includes an active area and bond pads on the upper surface. A window is supported above the active area by a window support. Interior traces are formed on a lower surface of a step up ring. Electrically conductive bumps are formed between the interior traces on the lower surface of the step up ring and the bond pads on the upper surface of the image sensor thus flip chip mounting the step up ring to the image sensor. Electrically conductive vias extend through the step up ring to electrically connect the interior traces to exterior traces formed on an upper surface of the step up ring.

Wafer-Scale Production Of Chip-Scale Semiconductor Packages Using Wafer Mapping Techniques

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US Patent:
6589801, Jul 8, 2003
Filed:
Aug 30, 1999
Appl. No.:
09/385694
Inventors:
Ju-Hoon Yoon - Seoul, KR
Dae-Byung Kang - Seoul, KR
In-Bae Park - Seoul, KR
Vincent DiCaprio - Mesa AZ
Markus K. Liebhard - Gilbert AZ
Assignee:
Amkor Technology, Inc. - Chandler AZ
International Classification:
H01L 2166
US Classification:
438 15, 438 14, 438107, 438112, 438127, 438460, 716 4, 716 5
Abstract:
A method is disclosed for manufacturing chip-scale semiconductor packages at a wafer-scale level using wafer mapping techniques. In the method, a semiconductor wafer and/or a circuit substrate, each respectively comprising a plurality of individual chips and circuit pattern units, is/are pre-tested and discriminated in terms of the quality and/or grade of each individual chip unit and/or circuit pattern unit contained therein. The test results are marked on the lower surface of each chip unit and/or on each pattern unit. The substrate is laminated to the wafer to form a laminated assembly prior to performing the packaging process, which typically includes a wire bonding step, an encapsulation step and a solder ball welding step. A plurality of connected package units are thereby formed in the laminated substrate-wafer assembly. The package units are then singulated from each other and the laminated assembly by a cutting process.

Chip Size Image Sensor Wirebond Package Fabrication Method

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US Patent:
6620646, Sep 16, 2003
Filed:
Nov 13, 2000
Appl. No.:
09/712314
Inventors:
Thomas P. Glenn - Gilbert AZ
Steven Webster - Chandler AZ
Markus K. Liebhard - Chandler AZ
Assignee:
Amkor Technology, Inc. - Chandler AZ
International Classification:
H01L 2148
US Classification:
438107, 438110, 438112, 438113, 438126, 438456, 438458, 438460
Abstract:
To form an image sensor package, a window is mounted above an active area on an upper surface of an image sensor. A noncritical region of the upper surface of the image sensor is between the active area and bond pads of the image sensor. A lower surface of a step up ring is mounted above the noncritical region of the upper surface of the image sensor. An upper surface of the step up ring includes a plurality of electrically conductive traces. Bond wires are formed between the bond pads of the image sensor and the electrically conductive traces on the upper surface of the step up ring. The step up ring is mounted so that the window is located in or adjacent a central aperture of the step up ring.

Chip Size Image Sensor Bumped Package Fabrication Method

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US Patent:
6629633, Oct 7, 2003
Filed:
Nov 13, 2000
Appl. No.:
09/711994
Inventors:
Thomas P. Glenn - Gilbert AZ
Steven Webster - Chandler AZ
Markus K. Liebhard - Chandler AZ
Assignee:
Amkor Technology, Inc. - Chandler AZ
International Classification:
B22K 3102
US Classification:
22818022, 228175, 2282481
Abstract:
To form an image sensor package, a window is mounted above an active area on an upper surface of an image sensor. The image sensor further includes a plurality of bond pads on the upper surface. Interior traces on a lower surface of a step up ring are aligned with the bond pads on the upper surface of the image sensor. Bumps are formed between the interior traces and the bond pads thus flip chip mounting the step up ring to the image sensor. The step up ring is mounted such that the window is located in or adjacent a central aperture of the step up ring. An underfill material is applied into the central aperture. The underfill material flows from the central aperture between the lower surface of the step up ring and the upper surface of the image sensor. The underfill material encloses the bumps. The underfill material is cured, if necessary, to form a package body.

Lead-Frame Method And Circuit Module Assembly Including Edge Stiffener

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US Patent:
6717822, Apr 6, 2004
Filed:
Sep 20, 2002
Appl. No.:
10/251410
Inventors:
Jeffrey Alan Miks - Chandler AZ
Markus Karl Liebhard - Oakland CA
Assignee:
Amkor Technology, Inc. - Chandler AZ
International Classification:
H05K 118
US Classification:
361764, 361773, 361718, 361776, 361774, 257666, 257670, 257713
Abstract:
An edge stiffener added to a lead-frame based circuit module provides protection of the peripheral flange of the circuit module during handling and manufacturing processes. The edge stiffener may be coupled to leads of the lead-frame for providing electrical contacts at the periphery of the circuit module or may be form widened portions of a tie bar that is connected to the lead frame by leads extending through gaps between the ends of the edge stiffener portions. Singulation of the circuit module will result in edge stiffener portions that are not coupled to the lead frame, but are secured within the encapsulant.
Markus K Liebhard from Benicia, CA, age ~59 Get Report