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Mahadevan Kausalya Ganapathi

from Palo Alto, CA
Age ~70

Mahadevan Ganapathi Phones & Addresses

  • 1843 Channing Ave, Palo Alto, CA 94303 (650) 566-8836
  • 4205 Wilkie Way, Palo Alto, CA 94306 (650) 224-9671
  • 4051 Verdosa Dr, Palo Alto, CA 94306 (650) 565-8538
  • Santa Clara, CA
  • Sunnyvale, CA
  • Ithaca, NY
  • Cadiz, CA
  • 4205 Wilkie Way, Palo Alto, CA 94306 (510) 706-2717

Work

Company: Independent consultant Jan 1995 Position: Gana

Education

Degree: PhD School / High School: University of Wisconsin-Madison 1976 to 1980 Specialities: Computer Science

Skills

C++ • Java • Tcp/Ip • Device Drivers • Verilog • Operating Systems • Architecture • Computer Architecture • Vhdl • Programming • Testing • C • Perl • Software Development • Linux • Unix • Software Engineering • Microprocessors • Distributed Systems • Sql • Cloud Computing • Python • Algorithms • Object Oriented Design • Shell Scripting • Software Design • System Architecture

Languages

Tamil • Hindi • Bengali • Sanskrit

Industries

Computer Software

Resumes

Resumes

Mahadevan Ganapathi Photo 1

Gana

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Location:
Palo Alto, CA
Industry:
Computer Software
Work:
Independent Consultant since Jan 1995
Gana

Stanford University 1980 - 1997
Gana
Education:
University of Wisconsin-Madison 1976 - 1980
PhD, Computer Science
Indian Institute of Technology 1971 - 1976
BTech, Electronics & Electrical Communication Engg.
st. xaviers calcutta 1960 - 1971
Skills:
C++
Java
Tcp/Ip
Device Drivers
Verilog
Operating Systems
Architecture
Computer Architecture
Vhdl
Programming
Testing
C
Perl
Software Development
Linux
Unix
Software Engineering
Microprocessors
Distributed Systems
Sql
Cloud Computing
Python
Algorithms
Object Oriented Design
Shell Scripting
Software Design
System Architecture
Languages:
Tamil
Hindi
Bengali
Sanskrit

Publications

Us Patents

Simulator Including Process Levelization

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US Patent:
57845930, Jul 21, 1998
Filed:
Sep 29, 1995
Appl. No.:
8/536031
Inventors:
Radha Vaidyanathan - Los Altos CA
Sivaram Krishna Nayudu - Jersey City NJ
Mahadevan Ganapathi - Sunnyvale CA
Assignee:
Synopsys, Inc. - Mountain View CA
International Classification:
G06F 9455
US Classification:
395500
Abstract:
A method of preparing a specification of a system for simulation on a computer system. The specification includes a hardware design language specification of the system. Analyze the specification to identify a set of processes, where each process includes a plurality of statements. Determine an evaluation order of the set of processes. Generate a combined process including a portion of the plurality of statements. The portion of the plurality of statements are included in the combined process so as to be evaluated according to the evaluation order.

Method And Apparatus Using A Memory Model

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US Patent:
60539488, Apr 25, 2000
Filed:
Dec 22, 1997
Appl. No.:
8/995708
Inventors:
Radha Vaidyanathan - Los Altos CA
Emil F. Girczyc - Los Altos CA
Sivaram Krishna Nayudu - Jersey City NJ
Mahadevan Ganapathi - Sunnyvale CA
Assignee:
Synopsys, Inc. - Mountain View CA
International Classification:
G06F 1750
US Classification:
703 14
Abstract:
A computer system including a memory model of a memory circuit. The computer system comprises a processor coupled to receive and manipulate the memory model, and a memory including the memory model. The memory model includes: a number of address bits corresponding to a number of address bits of the memory circuit; a number of data bits corresponding to a number of data bits of the memory circuit; and a memory type parameter corresponding to a type of the memory circuit.
Mahadevan Kausalya Ganapathi from Palo Alto, CA, age ~70 Get Report