Leroy Roy Winemberg

20190036516, Jan 31, 2019

Jul 27, 2017

15/661745

- Austin TX, US
LeRoy Winemberg - Austin TX, US

H03K 5/007
H03K 5/24

An integrated circuit device includes a substrate, a voltage monitor circuit formed on the substrate, and a trimming circuit formed on the substrate that includes a successive approximation register circuit having an input coupled to an output of the voltage monitor circuit; a beta multiplier circuit having an input coupled to an output of the successive approximation register circuit, an output coupled to a first input of the voltage monitor circuit, and a variable resistance circuit. A resistance value of the variable resistance circuit is controlled by the output of the successive approximation register.

20150121158, Apr 30, 2015

Oct 30, 2013

14/067886

XIAOXIAO WANG - Austin TX, US
Orman G. Shofner - Cedar Park TX, US
Dat T. Tran - Round Rock TX, US
Leroy Winemberg - Austin TX, US
Ender Yilmaz - Austin TX, US

G01R 31/3177

714726

System circuitry includes a logic circuit having an input and an output that is a functional element of the system circuitry. Pattern application circuitry is coupled to the input of the logic circuit and provides an input pattern to the input of the logic circuit. The input pattern has a valid signature based upon a comparison of the input and the output of the logic circuit when the logic circuit is functioning properly. A logic comparator is coupled to the input and the output of the logic circuit and generates pulses in response to the input pattern. A counter is coupled to the logic comparator that obtains a count of the pulses generated by the logic comparator in response to the input pattern. A signature comparator is coupled to the counter and generates a warning signal if the valid signature is different from the count.

20140281642, Sep 18, 2014

Mar 13, 2013

13/798715

XIAOXIAO WANG - Austin TX, US
NISAR AHMED - Bee Cave TX, US
ANIS M. JARRAR - Austin TX, US
DAT T. TRAN - Round Rock TX, US
LEROY WINEMBERG - Austin TX, US

G06F 1/26

713340

A data processing system on an integrated circuit includes a core that performs switching operations responsive to a system clock that draws current from the power supply network. An IR-drop detector includes a resistor ladder having outputs representative of an IR-drop caused by the core during the switching operations. The system further includes a plurality of amplifiers coupled to the outputs indicative of the IR-drop, a plurality of flip-flops coupled to the amplifiers, and a variable clock generator. The variable clock generator outputs a sampling clock comprising a group consisting of a variable phase or a variable frequency to the plurality of flip-flops. The flip-flops are triggered by the sampling clock so that the IR-drop at a time during a clock cycle of the system clock can be detected, and the peak IR-drop value for can be tracked.