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Kishore Te Bubna

from Fremont, CA
Age ~55
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Also known as:
Bubna Kishore, E Bubna
Phone and address:
204 Mcduff Ave, Fremont, CA 94539
(510) 687-9192
Related to:
Niket Bubna, 38Niket BubnaMahesh Gupta, 45Anita G Bubna, 48Neelam Bubna, 73
Connected to:
Daniel P Bubna, 43Nilesh Bubna, 47Barry S Bubnar, 53James M Bubnikowicz, 66Paul A Bubny, 64Kate A Buboltz, 30Carol J Bubolz, 85George Bubolz, 66Kay L Bubolz, 52Kenneth Bubonovich, 61

Kishore Bubna Phones & Addresses

  • 204 Mcduff Ave, Fremont, CA 94539 (510) 687-9192
  • Antioch, CA
  • 314 7Th St, Pittsburg, CA 94565 (925) 473-1122
  • 79 11Th St, Troy, NY 12180 (518) 274-0448
  • Walnut Creek, CA
  • El Cerrito, CA

Resumes

Resumes

Kishore Bubna Photo 1

Founder And Chief Executive Officer

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Location:
Fremont, CA
Industry:
Chemicals
Work:
Ranichem Industrial Corporation
Founder and Chief Executive Officer
Education:
Calcutta University, Kolkata 1974 - 1977
Bachelor of Commerce, Bachelors, Business Administration, Management, Business Administration and Management
Skills:
Business Strategy
Management
Business Planning
Product Development
Trading
New Business Development
Negotiation
Manufacturing
Strategic Planning
Sales Management
Interests:
Environment
Economic Empowerment
Health
Languages:
English
Hindi
Bengali
Kishore Bubna Photo 2

Kishore Bubna

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Location:
San Francisco, CA
Industry:
Semiconductors
Work:
KLA-Tencor since Nov 2011
Sr. Director of Software Engineering
KLA-Tencor Sep 2009 - Oct 2011
Senior Director, Software and Algorithms
KLA-Tencor Aug 2006 - Aug 2009
Manager, Software and Algorithms
Education:
Rensselaer Polytechnic Institute 1993 - 1998
Ph.D., Computer Science, Computer Vision Rensselaer Polytechnic Institute 1991 - 1993
M.S, Computer Science, Computer Vision Indian Institute of Technology, Kharagpur 1987 - 1991
B.Tech (Hons), Computer Science and Engineering
Skills:
Semiconductors
Software Engineering
Engineering Management
Algorithms
Semiconductor Industry
Program Management
Leadership
Embedded Systems
Testing
Product Lifecycle Management
Cross Functional Team Leadership
Project Management
Ic
Embedded Software
Debugging
System Architecture
Firmware
Integrated Circuits

Publications

Us Patents

Full Swath Analysis

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US Patent:
7024339, Apr 4, 2006
Filed:
Oct 18, 2004
Appl. No.:
10/967838
Inventors:
Krishnamurthy Bhaskar - San Jose CA, US
Mark J. Roulo - Mountain View CA, US
John S. Taylor - San Jose CA, US
Lawrence R. Miller - Los Altos CA, US
Paul T. Russell - Scotts Valley CA, US
Jason Z. Lin - Saratoga CA, US
Eliezer Rosengaus - Palo Alto CA, US
Richard M. Wallingford - San Jose CA, US
Kishore Bubna - Fremont CA, US
Assignee:
KLA-Tencor Technologies Corporation - Milpitas CA
International Classification:
G06F 15/00
US Classification:
702185
Abstract:
An inspection system for detecting anomalies on a substrate. A first network is coupled to a sensor array and communicates image data. Process nodes are coupled to the first network, and processes the data to produce reports. Each process node has an interface card that formats the data for a high speed interface bus that is coupled to the interface card. A computer receives and processes the data to produce the anomaly report. A second network receives the anomaly reports from the process nodes. A job manager is coupled to the second network, and receives the anomaly reports from the process nodes and sends information to the process nodes to coordinate the processing of the data in the process nodes.

Memory Load Balancing

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US Patent:
7076390, Jul 11, 2006
Filed:
Oct 18, 2004
Appl. No.:
10/967397
Inventors:
Krishnamurthy Bhaskar - San Jose CA, US
Mark J. Roulo - Mountain View CA, US
John S. Taylor - San Jose CA, US
Lawrence R. Miller - Los Altos CA, US
Paul T. Russell - Scotts Valley CA, US
Jason Z. Lin - Saratoga CA, US
Eliezer Rosengaus - Palo Alto CA, US
Richard M. Wallingford - San Jose CA, US
Kishore Bubna - Fremont CA, US
Assignee:
KLA-Tencor Technologies Corporation - Milpitas CA
International Classification:
G06F 15/00
US Classification:
702117, 702185
Abstract:
An inspection system for detecting anomalies on a substrate. A first network is coupled to a sensor array and communicates data. Process nodes are coupled to the first network, and process the data to produce reports. Each process node includes memory sufficient to buffer the data until it can process the data. Each process node has an interface card that formats the data for a high speed interface bus that is coupled to the interface card. A computer receives and processes the data to produce the report. A second network receives the reports. A job manager is coupled to the second network, receives the reports, and sends information to the process nodes to coordinate processing of the data.

Programmable Image Computer

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US Patent:
7149642, Dec 12, 2006
Filed:
Oct 18, 2004
Appl. No.:
10/967388
Inventors:
Krishnamurthy Bhaskar - San Jose CA, US
Mark J. Roulo - Mountain View CA, US
John S. Taylor - San Jose CA, US
Lawrence R. Miller - Los Altos CA, US
Paul T. Russell - Scotts Valley CA, US
Jason Z. Lin - Saratoga CA, US
Eliezer Rosengaus - Palo Alto CA, US
Richard M. Wallingford - San Jose CA, US
Kishore Bubna - Fremont CA, US
Assignee:
KLA-Tencor Technologies Corporation - Milpitas CA
International Classification:
G06F 15/00
US Classification:
702117, 702122, 702185
Abstract:
An inspection system for detecting anomalies on a substrate. A first network is coupled to a sensor array and communicates data. Process nodes are coupled to the first network, and process the data to produce reports. Each process node has an interface card that formats the data for a high speed interface bus that is coupled to the interface card. A computer receives and processes the data to produce the report. A second network receives the reports. A job manager is coupled to the second network, receives the reports, and sends information to the process nodes to coordinate processing of the data.

Status Polling

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US Patent:
7181368, Feb 20, 2007
Filed:
Oct 18, 2004
Appl. No.:
10/967419
Inventors:
Krishnamurthy Bhaskar - San Jose CA, US
Mark J. Roulo - Mountain View CA, US
John S. Taylor - San Jose CA, US
Lawrence R. Miller - Los Altos CA, US
Paul T. Russell - Scotts Valley CA, US
Jason Z. Lin - Saratoga CA, US
Eliezer Rosengaus - Palo Alto CA, US
Richard M. Wallingford - San Jose CA, US
Kishore Bubna - Fremont CA, US
Assignee:
KLA-Tencor Technologies Corporation - Milpitas CA
International Classification:
G06F 11/30
US Classification:
702185, 702183
Abstract:
An inspection system for detecting anomalies on a substrate. The inspection system has a sensor array for generating image data. A first high speed network is coupled to the sensor array and receives and communicates the image data. An array of process nodes is coupled to the first high speed network, and receives and processes the image data to produce anomaly reports. Each process node has an interface card coupled to the first high speed network, that receives the image data from the first high speed network and formats the image data according to a high speed interface bus protocol. The interface card sets a register indicating whether a predetermined amount of image data has been stored in a memory, and the process node reads the register to determine whether the predetermined amount of image data has been stored in the memory, and initiates image processing when the register indicates that the predetermined amount of image data has been stored in the memory.

Full Swath Analysis

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US Patent:
7251586, Jul 31, 2007
Filed:
Dec 21, 2005
Appl. No.:
11/314627
Inventors:
Krishnamurthy Bhaskar - San Jose CA, US
Mark J. Roulo - Mountain View CA, US
John S. Taylor - San Jose CA, US
Lawrence R. Miller - Los Altos CA, US
Paul T. Russell - Scotts Valley CA, US
Jason Z. Lin - Saratoga CA, US
Eliezer Rosengaus - Palo Alto CA, US
Richard M. Wallingford - San Jose CA, US
Kishore Bubna - Fremont CA, US
Assignee:
KLA-Tencor Technologies Corporation - Milpitas CA
International Classification:
G21C 17/00
G06F 11/30
G06F 15/00
US Classification:
702185
Abstract:
An inspection system for detecting anomalies on a substrate. A first network is coupled to the sensor array and communicates image data. Process nodes are couple to the first network, and process the data to produce reports. Each process node has an interface card that formats the data for a high speed interface bus that is coupled to the interface card. A computer receives and processes the data to produce the report. A second network receives the reports from the process nodes. A job manager is coupled to the second network, and receives the reports from the process nodes and sends information to the process nodes to coordinate the processing of the data in the process nodes.

Programmable Image Computer

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US Patent:
7379838, May 27, 2008
Filed:
Sep 8, 2006
Appl. No.:
11/530153
Inventors:
Krishnamurthy Bhaskar - San Jose CA, US
Mark J. Roulo - Mountain View CA, US
John S. Taylor - San Jose CA, US
Lawrence R. Miller - Los Altos CA, US
Paul T. Russell - Scotts Valley CA, US
Jason Z. Lin - Saratoga CA, US
Eliezer Rosengaus - Palo Alto CA, US
Richard M. Wallingford - San Jose CA, US
Kishore Bubna - Fremont CA, US
Assignee:
KLA-Tencor Corporation - San Jose CA
International Classification:
G06F 15/00
US Classification:
702127, 382145
Abstract:
An inspection system for detecting anomalies on a substrate. A first network is coupled to a sensor array and communicates data. Process nodes are coupled to the first network, and process the data to produce reports. Each process node has an interface card that formats the data for a high speed interface bus that is coupled to the interface card. A computer receives and processes the data to produce the report. A second network receives the reports. A job manager is coupled to the second network, receives the reports, and sends information to the process nodes to coordinate processing of the data.

Daisy Chained Topology

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US Patent:
7555409, Jun 30, 2009
Filed:
Oct 18, 2004
Appl. No.:
10/967542
Inventors:
Krishnamurthy Bhaskar - San Jose CA, US
Mark J. Roulo - Mountain View CA, US
John S. Taylor - San Jose CA, US
Lawrence R. Miller - Los Altos CA, US
Paul T. Russell - Scotts Valley CA, US
Jason Z. Lin - Saratoga CA, US
Eliezer Rosengaus - Palo Alto CA, US
Richard M. Wallingford - San Jose CA, US
Kishore Bubna - Fremont CA, US
Assignee:
KLA-Tencor Corporation - Milpitas CA
International Classification:
G06F 11/30
US Classification:
702185
Abstract:
An inspection system. The inspection system has a sensor for generating data. A first network is coupled to the sensor and communicates the data. An array of nodes is coupled to the first network, and processes the data to produce reports. Each node has an interface coupled to the first network, and formats the data according to protocol. A bus is coupled to the interface A computer is coupled to the bus, and process the data according to an algorithm, to produce the report. The array of nodes is coupled to the first network in a daisy chain topology, and each node within a column of nodes receives common data with other nodes within the column. A second network is coupled to the nodes the second network, and receives the anomaly reports from the nodes and sends information to the nodes to coordinate processing of the data.

Mirror Node Process Verification

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US Patent:
7602958, Oct 13, 2009
Filed:
Oct 18, 2004
Appl. No.:
10/967418
Inventors:
Krishnamurthy Bhaskar - San Jose CA, US
Mark J. Roulo - Mountain View CA, US
John S. Taylor - San Jose CA, US
Lawrence R. Miller - Los Altos CA, US
Paul T. Russell - Scotts Valley CA, US
Jason Z. Lin - Saratoga CA, US
Eliezer Rosengaus - Palo Alto CA, US
Richard M. Wallingford - San Jose CA, US
Kishore Bubna - Fremont CA, US
Assignee:
KLA-Tencor Corporation - Milpitas CA
International Classification:
G06K 9/00
US Classification:
382141
Abstract:
An inspection image analysis system. At least one image processing computer is configured to receive and analyze at least one portion of an image. At least one test computer is configured to receive at least one common portion of the image also received by the at least one image processing computer, and to analyze the at least one common portion, using equivalent image processes as the corresponding at least one image processing computer. A job manager is configured to assign the common portion and to configure the corresponding image processing computer and the test computer to run equivalent image processes.
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Kishore Te Bubna from Fremont, CA, age ~55 Get Report