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Keith D Rast

from Yacolt, WA
Age ~63
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Also known as:
Keith T Rast, Keith D Raas, Keith T
Phone and address:
22002 Lucia Falls Rd, Yacolt, WA 98675
(360) 686-0549
Related to:
Richard G Rast, 76Joy L Welsh, 76Graham Olsen, 39Jenna Minnuies, 42Wayne Ellingson, 93Kimberly A Carter, 55
Connected to:
Carolyn S Rast, 86Celeste Rast, 35Dagmar E Rast, 71Darlene A Rast, 70Denise L Rast, 60Erik W Rast, 54Linda A Rast, 71Michael J Rast, 60Michelle D Rast, 71Shaw G Rast, 52

Keith Rast Phones & Addresses

  • 22002 Lucia Falls Rd, Yacolt, WA 98675 (360) 686-0549 (360) 686-3980
  • Vancouver, WA
  • Brush Prairie, WA
  • 22002 NE Lucia Falls Rd, Yacolt, WA 98675 (360) 609-3016

Work

Position: Service Occupations

Emails

k***[email protected]

Resumes

Resumes

Keith Rast Photo 1

Senior Staff Applications Consultant

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Location:
22002 northeast Lucia Falls Rd, Yacolt, WA 98675
Industry:
Computer Software
Work:
Synopsys
Senior Staff Applications Consultant
Avanti May 1998 - Jun 2002
Applications Engineer
Maxim Integrated Nov 1993 - May 1998
Cad Engineer
Tektronix Nov 1984 - Nov 1993
Mask Designer and Cad Engineer
Education:
University of Portland 1982 - 1984
Bachelors, Bachelor of Science In Electrical Engineering, Computer Engineering Clark College 1979 - 1982
Skills:
Physical Verification
Drc
Eda
Lvs
Asic
Soc
Semiconductors
Ic
Debugging
Tcl
Mixed Signal
Vlsi
Application Specific Integrated Circuits
Perl
Physical Design
System on A Chip
Design Rule Checking
Parasitic Extraction
Keith Rast Photo 2

Keith Rast

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Publications

Us Patents

Method And Apparatus For Managing Violations And Error Classifications During Physical Verification

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US Patent:
8091055, Jan 3, 2012
Filed:
Jan 26, 2009
Appl. No.:
12/359676
Inventors:
Kevin Brelsford - Bedford NH, US
Keith Rast - Yacolt WA, US
William Christopher Dunn - Raleigh NC, US
Jason Richard Puryear - Cary NC, US
Assignee:
Synopsys, Inc. - Mountain View CA
International Classification:
G06F 9/455
G06F 17/50
US Classification:
716111, 716106, 716107, 716112, 716118, 716119, 716139, 707758, 707781, 707785, 707802, 707803, 707804
Abstract:
Some embodiments provide a system for managing violations during physical verification. The system may identify a design-rule-check (DRC) violation by applying a set of DRC rules to a layout. The system can then receive an error classification from the user which specifies how the DRC violation is to be handled. Next, the system can store the DRC violation, the user-selected error classification, and a user identifier associated with the user in a database. If the user is not authorized to approve the error classification, the database can indicate that the error classification has not been approved. Later, a user who is authorized to approve the error classification can approve the error classification. The system can determine if a cell is known, and if so, the system can use the violations and error classifications stored in the database to speed up the verification process.

Method And Apparatus For Computing Feature Density Of A Chip Layout

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US Patent:
20060195803, Aug 31, 2006
Filed:
Aug 29, 2005
Appl. No.:
11/214959
Inventors:
Keith Rast - Yacolt WA, US
Zia Azam - Cary NC, US
International Classification:
G06F 17/50
US Classification:
716004000, 716009000
Abstract:
One embodiment of the present invention provides a system that computes feature density for a number of areas within a layout by moving a window across the layout, which allows the system to identify areas in the layout that violate a design rule. During operation, the system receives a layout. Next, the system places the window at a first location in the layout. The system then computes the feature density value based on the features within the window at the first location. Next, the system determines a second location in the layout based on the first location and the feature density value. The system then moves the window to the second location. Next, the system computes the feature density value based on the features within the window at the second location. Note that determining the second location in the layout based on the feature density value computed at the first location instead of using a constant displacement from the first location allows the system to accurately identify an area that violates the design rule.
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Keith D Rast from Yacolt, WA, age ~63 Get Report