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Jun Amano Phones & Addresses

  • San Jose, CA
  • Mountain View, CA
  • Los Gatos, CA
  • 1210 Beethoven Cmn, Fremont, CA 94538 (510) 713-0631
  • 1000 National Ave APT 446, San Bruno, CA 94066
  • Lakewood, CO
  • Avondale, CO
  • Santa Clara, CA
  • 1302 The Alameda APT 105, San Jose, CA 95126

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Jun Amano

Us Patents

Oriented Rhombohedral Composition Of Pbzr1-Xtixo3 Thin Films For Low Voltage Operation Ferroelectric Ram

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US Patent:
6396094, May 28, 2002
Filed:
May 12, 2000
Appl. No.:
09/570185
Inventors:
Laura Wills Mirkarimi - Sunol CA
Jun Amano - Hillsborough CA
Assignee:
Agilent Technologies, Inc. - Palo Alto CA
Texas Instruments, Inc. - Dallas TX
International Classification:
H01L 2976
US Classification:
257295, 257296, 257300, 438 3
Abstract:
A means to minimize physical distortion and modifications in the electrical properties of ferroelectric films incorporated into semiconductor devices is proposed. By introducing crystallographic texture into these ferroelectric films, the piezoelectric coefficient of the material can be minimized, reducing the interaction between a voltage across and mechanical stress on the film. In addition to having low piezoelectric coefficients, rhombohedral lead zirconate titanate films oriented along (111) exhibit low coercive fields and high remnant polarization, increasing their usefulness in layered semiconductor devices.

Method Of Fabricating A Ferroelectric Memory Cell

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US Patent:
6548343, Apr 15, 2003
Filed:
Oct 31, 2000
Appl. No.:
09/702985
Inventors:
Scott R. Summerfelt - Cupertino CA
Theodore S. Moise - Los Altos CA
Guoqiang Xing - Plano TX
Luigi Colombo - Dallas TX
Tomoyuki Sakoda - San Jose CA
Stephen R. Gilbert - San Francisco CA
Alvin L. S. Loke - Singapore, SG
Shawming Ma - Sunnyvale CA
Rahim Kavari - Campbell CA
Jun Amano - Hillsborough CA
Assignee:
Agilent Technologies Texas Instruments Incorporated - Dallas TX
International Classification:
H01L 218242
US Classification:
438240, 438 3, 438250, 438393
Abstract:
An embodiment of the instant invention is a method of fabricating a ferroelectric capacitor which is situated over a structure, the method comprising the steps of: forming a bottom electrode on the structure ( of FIG. ), the bottom electrode having a top surface and sides; forming a capacitor dielectric ( of FIG. ) comprised of a ferroelectric material on the bottom electrode, the capacitor dielectric having a top surface and sides; forming a top electrode ( and of FIG. ) on the capacitor dielectric, the top electrode having a top surface and sides, the ferroelectric capacitor is comprised of the bottom electrode, the capacitor dielectric, and the top electrode; forming a barrier layer ( and of FIG. ) on the side of the bottom electrode, the side of the capacitor dielectric, and the side of the top electrode; forming a dielectric layer on the barrier layer and the structure, the dielectric having a top surface and a bottom surface; and performing a thermal step for a duration at a temperature between 400 and 900 C. in an ambient comprised of a gas selected from the group consisting of: argon, nitrogen, and a combination thereof, the step of performing a thermal step being performed after the step of forming the barrier layer.

Lead-Based Perovskite Buffer For Forming Indium Phosphide On Silicon

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US Patent:
6872252, Mar 29, 2005
Filed:
Mar 6, 2002
Appl. No.:
10/093342
Inventors:
Jun Amano - Hillsborough CA, US
Assignee:
Agilent Technologies, Inc. - Palo Alto CA
International Classification:
C30B025/18
C30B023/02
B32B015/00
US Classification:
117 84, 428643, 117 95
Abstract:
A method of forming a high quality epitaxial indium phosphide layer on a silicon substrate and a semiconductor device formed by the same method are described. In one aspect, a lead-based perovskite buffer is formed on a silicon substrate, and an epitaxial indium phosphide layer is formed on the lead-based perovskite buffer. In accordance with this approach, relatively large (e. g. , up to 300 millimeters in diameter) high quality indium phosphide films may be produced with the relatively high mechanical stability provided by silicon substrates. In this way, intrinsic problems associated with prior approaches that involve growth of high quality indium phosphide thin films on indium phosphide substrates, which are characterized by small wafer size, brittleness and high cost, may be avoided.

Piezoelectric Cantilever Pressure Sensor Array

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US Patent:
7032454, Apr 25, 2006
Filed:
Mar 5, 2004
Appl. No.:
10/792891
Inventors:
Jun Amano - Hillsborough CA, US
Assignee:
Agilent Technologies, Inc. - Palo Alto CA
International Classification:
G01L 11/00
US Classification:
73704, 73702, 73717
Abstract:
A piezoelectric cantilever pressure sensor array is disclosed. The piezoelectric cantilever pressure sensor array contains a substrate, a readout circuit, and piezoelectric cantilever pressure sensors electrically connected to the readout circuit. Each piezoelectric cantilever pressure sensor contains an elongate piezoelectric cantilever mounted at one end on the substrate and extending over a cavity. The piezoelectric cantilever contains a piezoelectric layer sandwiched between two electrodes and generates a measurable voltage when deformed under pressure. The piezoelectric cantilever pressure sensor array can be manufactured at low cost and used in various applications including fingerprint identification devices.

Piezoelectric Cantilever Pressure Sensor

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US Patent:
7104134, Sep 12, 2006
Filed:
Mar 5, 2004
Appl. No.:
10/792777
Inventors:
Jun Amano - Hillsborough CA, US
Mark A. Unkrich - Redwood City CA, US
Assignee:
Agilent Technologies, Inc. - Palo Alto CA
International Classification:
G01L 11/00
US Classification:
73704, 73702, 73706, 73715
Abstract:
A piezoelectric cantilever pressure sensor has a substrate and a piezoelectric cantilever having a base portion attached to the substrate and a beam portion suspended over a cavity. The piezoelectric cantilever contains a piezoelectric layer sandwiched between two electrodes and generates a measurable voltage when deformed under pressure. The piezoelectric cantilever pressure sensor can be manufactured at low cost and used in various applications including fingerprint identification devices.

Piezoelectrically-Activated Cantilevered Spatial Light Modulator

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US Patent:
7136215, Nov 14, 2006
Filed:
May 18, 2005
Appl. No.:
11/131706
Inventors:
Akihiro Machida - Sunnyvale CA, US
Jun Amano - Hillsborough CA, US
Assignee:
Avago Technologies Fiber IP (Singapore) Pte. Ltd. - Singapore
International Classification:
G02B 26/00
G02B 26/08
G01B 5/28
G01J 5/00
US Classification:
359295, 359290, 359291, 359221, 359850, 73105, 2503381, 250306, 29 2535, 361278, 20419234
Abstract:
A piezoelectric spatial light modulator including a substrate having an array of cavities and piezoelectric cantilevers is arranged on the substrate. Each of the piezoelectric cantilevers includes a base portion on the substrate and a beam portion extending over a respective one of the cavities. Each of the piezoelectric cantilevers further includes a first electrode, a second electrode and a piezoelectric element between the electrodes. A flexible layer covers the cavities and the piezoelectric cantilevers and reflective elements are each located on the flexible layer over a respective one of the beam portions.

Method Of Making Piezoelectric Cantilever Pressure Sensor Array

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US Patent:
20050210988, Sep 29, 2005
Filed:
Mar 5, 2004
Appl. No.:
10/792778
Inventors:
Jun Amano - Hillsborough CA, US
Farid Matta - Los Altos CA, US
Jeremy Theil - Mountain View CA, US
Stephen Gilbert - San Francisco CA, US
International Classification:
H01L021/00
H01L021/4763
G01L011/00
US Classification:
073704000, 438052000
Abstract:
A method for making piezoelectric cantilever pressure sensor array is disclosed. The method contains forming a layer structure comprising a substrate, an elastic layer, a first electrode layer, a piezoelectric layer, and a second electrode layer, defining piezoelectric cantilevers in the layer structure, defining Y-lines in the first electrode layer, forming X-lines; and creating a cavity under each piezoelectric cantilever. The piezoelectric cantilever pressure sensor array can be used in various applications including fingerprint identification devices.

Methods And Devices For Diagnostic Testing

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US Patent:
20080081326, Apr 3, 2008
Filed:
Oct 3, 2006
Appl. No.:
11/542504
Inventors:
Jun Amano - Hillsborough CA, US
International Classification:
C12Q 1/70
G01N 33/574
G01N 33/569
G01N 33/554
G01N 33/543
G01N 33/53
US Classification:
435 5, 435 731, 435 732, 435 723, 436518, 977902, 4352872
Abstract:
Methods, devices and apparatus are disclosed for analyzing a sample for the presence of one or more analytes. A sample is contacted with a well comprising a plurality of p-n junction nanowire pairs. One member of the nanowire pair comprises a capture moiety, and one member of the nanowire pair is an excitation nanowire and the other member is a detection nanowire. The contacting is carried out under conditions for binding of an analyte to a respective binding partner. The excitation nanowire is employed to excite a luminescent label bound to the capture moiety and the detection nanowire is used to detect a signal resulting from excitation of the luminescent label. The amount of the signal is related to the presence and/or amount of an analyte in the sample.
Jun Amano from San Jose, CA, age ~50 Get Report