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Jefferson L Gokingco

from Austin, TX
Age ~62
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Also known as:
Jefferson Lim Gokingco, Jefferson Etal Gokingco, Jefferson Stephanie Gokingco, Jeff L Gokingco, Jeffl Gokingco, Jefferson O, Jeff O
Phone and address:
11217 Bay Ln, Austin, TX 78739
(512) 301-1033
Related to:
Abrahan D Nunez, 47Priscila B Barajas, 41Stephanie C Sia, 57Matthew L Gokingco, 63Mark L Gokingco, 53Corey D Gokingco, 57Jeannie L Frei, 66James R Frei, 75Hannah M Gokingco, 29
Connected to:
Hasmita P Goklaney, 68Bhagwan V Goklani, 72Sunil B Goklani, 42Erol Goknur, 42Robert J Gokoo, 70Baldeo G Gokool, 78Sheldon C Gokool, 48Samanta Gokova, 36Timur Goksel, 74Ayhan M Goksen, 49

Jefferson Gokingco Phones & Addresses

  • 11217 Bay Ln, Austin, TX 78739 (512) 301-1033
  • 12224 Tanglewild Dr, Austin, TX 78758 (512) 301-1033
  • 3318 Silk Oak Cv, Austin, TX 78748 (512) 282-6590
  • Temple, TX

Work

Position: Professional/Technical

Education

Degree: Associate degree or higher

Emails

j***[email protected]

Industries

Semiconductors

Resumes

Resumes

Jefferson Gokingco Photo 1

Jefferson Gokingco

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Location:
Austin, Texas Area
Industry:
Semiconductors

Publications

Us Patents

Multi-Stage Isolation Barrier Circuitry And Method For Connection Of A Telephony Device To A Telephone Line

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US Patent:
7058173, Jun 6, 2006
Filed:
Feb 27, 2002
Appl. No.:
10/085499
Inventors:
Raymond Andrew Saksa - Brownsburg IN, US
Jefferson Lim Gokingco - Austin TX, US
Timothy Joseph Dupuis - Austin TX, US
Assignee:
Thomson Licensing - Boulogne
Silicon Laboratories Inc. - Austin TX
International Classification:
H02M 1/04
US Classification:
379412, 361119
Abstract:
A multi-stage surge protector/isolation barrier is provided for connection between a telephony device and a telephone network. The multi-stage surge protector/isolation barrier includes a first stage and a second stage. The first stage is operative to limit or clamp incoming voltage to a pre-defined level. In one form, the voltage limiting or clamping state includes a spark gap and over-voltage/over-current protector. The second stage is operative to limit or dissipate transients developed by the first stage. In one form, the transient limiting or dissipating stage includes transient filter circuitry. The transient filter circuitry may be implemented as LC filter circuitry. The subject multi-stage surge protector/isolation barrier helps prevent damage to the telephony device caused by voltage surges in the telephone network.

Systems And Methods For A Digital-To-Charge Converter (Dqc)

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US Patent:
20110248649, Oct 13, 2011
Filed:
Dec 22, 2010
Appl. No.:
12/975819
Inventors:
Jefferson L. Gokingco - Austin TX, US
Stephen C. Gerber - Austin TX, US
Wayne T. Holcombe - Mountain View CA, US
Miroslav Svajda - San Jose CA, US
Robert G. Farmer - Modesto CA, US
International Classification:
H05B 41/36
H03M 1/66
US Classification:
315307, 341150
Abstract:
Systems and methods for a digital-to-charge converter (“DQC”) are disclosed. A DQC may include a converting circuit configured to receive a first digital signal indicative of a voltage across a capacitor coupled to an output pin of the digital-to-charge converter and to determine a present charge of the capacitor based at least in part on the first digital signal. The DQC may also include an error determining circuit coupled to the converting circuit, wherein the error determining circuit is configured to receive a second digital signal indicative of a target charge via an input pin of the digital-to-charge converter and to determine a difference between the target charge and the present charge. The DQC may further include a correction circuit coupled to the error determining circuit and configured to control a programmable current source to produce an analog signal at the output pin in response to the determined difference.

Data Processing System And Method For Storing And Restoring A Stack Pointer

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US Patent:
57614911, Jun 2, 1998
Filed:
Apr 15, 1996
Appl. No.:
8/632187
Inventors:
Joseph C. Circello - Phoenix AZ
Jefferson Gokingco - Austin TX
Assignee:
Motorola Inc. - Schaumburg IL
International Classification:
G06F 930
G06F 946
US Classification:
395591
Abstract:
A data processor (3) implements a single system stack pointer (244) to create records of both supervisor and user stack operations when hardware support for misalignment of such stack operations is optional. The single system stack pointer is implemented as a self-aligning stack pointer which automatically aligns itself to a nearest 0-modulo-4 address below a current address setting such that no alignment system errors occur even when there is no hardware support for misaligned operands. Once the automatic alignment has occurred, the data processor stores a format field in an exception stack frame to indicate information about the alignment of the stack pointer at the time of the error. When the exception has been serviced, the processor uses the four bit format field stored in the exception stack frame to restore the stack pointer to its original value at the time of the exception.

Data Processing System And A Method For Cycling Longword Addresses During A Burst Bus Cycle

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US Patent:
56385285, Jun 10, 1997
Filed:
Nov 1, 1993
Appl. No.:
8/143731
Inventors:
James G. Gay - Pfugerville TX
Ronald W. Stence - Austin TX
Jefferson L. Gokingco - Austin TX
John P. Hansen - Austin TX
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
G06F 1202
US Classification:
39542107
Abstract:
A method and apparatus for controlling a bus within a data processing system has a first control bit (SAS*), and second control bit (CLA*), and at least one termination signal (TA*, TRA*, TEA*). The CLA* signal is an input to a primary master (10). The primary master (10) provides a base address external to the primary master (10) so that a slave device can access the base address. The CLA* signal is asserted by the slave device to signal that the base address is to be cycled in a bit-wise circular fashion to provide a plurality of addresses out from the primary master (10) wherein each address in the plurality is derived from the base address internal to the primary master (10). Typically four addresses are provided per base address via the internal control of the primary master (10) in response to three sequential assertions of the CLA* signal.

Light Detector Using An On-Die Interference Filter

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US Patent:
20160118509, Apr 28, 2016
Filed:
Oct 28, 2014
Appl. No.:
14/525807
Inventors:
- Austin TX, US
Kevin T. Kilbane - Austin TX, US
Jefferson Lim Gokingco - Austin TX, US
International Classification:
H01L 31/0216
H01L 31/0232
Abstract:
A light detector includes a semiconductor die that provides a photo sensor. An interference filter is formed on the semiconductor die and has a pass band corresponding to a wavelength of a light emitting diode to supply filtered light in the pass band to the photo sensor.
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Jefferson L Gokingco from Austin, TX, age ~62 Get Report