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Ian C Ender

from Bothell, WA
Age ~41
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Related to:
Otis Wayne Walker, 49Nathan A Shandy, 43Jennifer C West, 67Lula M West, 68Laura E Ender, 39Victoria A Ender, 73Vivian Ilene West, 96Andrew B West, 41Carley Ender, 38Boyd E West, 67Milton E Ender, 74
Connected to:
Anita R Ender, 112Becky A Ender, 43Carrion Ender, 48Daniel K Ender, 41Janna M Ender, 47Jennifer L Ender, 43Kristina Ender, 58Nick F Ender, 33Pamela S Ender, 69Sharon L Ender, 52

Ian Ender Phones & Addresses

  • 19228 Sprague Dr, Bothell, WA 98012 (509) 432-9591
  • 928 Maple St, Pullman, WA 99163 (509) 334-1179
  • 150 Terre View Dr, Pullman, WA 99163 (509) 334-1179
  • 931 Governors Blvd, Billings, MT 59105 (406) 245-5063
  • Cleveland, MS

Work

Company: Facebook Jan 2019 Position: Fpga engineer

Education

Degree: Master of Science, Masters School / High School: Washington State University 2007 to 2012 Specialities: Computer Engineering

Skills

Fpga • Xilinx • Vhdl • Embedded Systems • Altera • Cpld • Firmware • Schematic Capture • Rtl Design • Xilinx Ise • Rtl Coding • Debugging • Oscilloscope • Logic Synthesis • C • Embedded Software • Iec 61850 • Matlab • Perl • Software Engineering • Electrical Engineering • Hardware Architecture

Languages

English

Interests

Science and Technology • Environment

Emails

i***[email protected]

Industries

Electrical/Electronic Manufacturing

Resumes

Resumes

Ian Ender Photo 1

Fpga Engineer

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Location:
466 Hampshire Dr, Gaffney, SC 29341
Industry:
Electrical/Electronic Manufacturing
Work:
Facebook
Fpga Engineer
Echodyne Corp
Senior Fpga Engineer
Sel Feb 2005 - Mar 2018
Senior Hardware Engineer at Schweitzer Engineering Laboratories
Sel Sep 2007 - Oct 2012
Lead Hardware Engineer
Sel Sep 2006 - Aug 2007
Hardware Engineer
Education:
Washington State University 2007 - 2012
Master of Science, Masters, Computer Engineering Washington State University 2001 - 2005
Bachelors, Bachelor of Science, Computer Engineering
Skills:
Fpga
Xilinx
Vhdl
Embedded Systems
Altera
Cpld
Firmware
Schematic Capture
Rtl Design
Xilinx Ise
Rtl Coding
Debugging
Oscilloscope
Logic Synthesis
C
Embedded Software
Iec 61850
Matlab
Perl
Software Engineering
Electrical Engineering
Hardware Architecture
Interests:
Science and Technology
Environment
Languages:
English

Publications

Us Patents

Systems And Methods For Resampling Unreliable Data

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US Patent:
20080049880, Feb 28, 2008
Filed:
Aug 21, 2007
Appl. No.:
11/894357
Inventors:
Gregary C. Zweigle - Pullman WA, US
Ian C. Ender - Pullman WA, US
International Classification:
H04L 7/00
US Classification:
375355
Abstract:
Systems and methods providing resampling of a sampled data transmitted through a communication channel. Reliable resampling is provided even when original data samples are lost or reordered during transmission through the network. In one embodiment, a receiver associates each received data sample with a respective sampling time instant. The received data may include index values that associate the received data samples with respective sampling time instants. In other embodiments, the received data includes time stamps with encoded sampling time instant information. In another embodiment, arrival time instants are used to correlate the received data samples with their respective sampling time instants. The receiver then uses the sampling time information to select data samples corresponding to resampling time instants. If needed, the receiver uses interpolation to generate resampled data points corresponding to the resampling time instants.

Network Device

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US Patent:
20140211624, Jul 31, 2014
Filed:
Dec 2, 2013
Appl. No.:
14/094211
Inventors:
- Pullman WA, US
David M. Rector - Pullman WA, US
Damian Sanchez Moreno - Moscow ID, US
M. Wesley Kunzler - Moscow ID, US
Srinivas Achanta - Pullman WA, US
Jerry J. Bennett - Pullman WA, US
Ian C. Ender - Bothell WA, US
Assignee:
SCHWEITZER ENGINEERING LABORATORIES, INC. - Pullman WA
International Classification:
H04L 12/835
US Classification:
370235
Abstract:
Disclosed is a network communication switch that facilitates reliable communication of high priority traffic over lower priority traffic across all ingress and egress ports. The network communication switch may monitor the frame storage buffer regardless of egress port, and when the frame storage buffer reaches a predetermined level, the switch may discard lower priority frames from the most congested port. When the frame storage buffer reaches a second predetermined level, the switch may discard lower priority frames before they are stored according to egress port. The network communication switch may further monitor ingress frames for priority, and assign priority to frames according to pre-assigned priority, ingress port, and/or frame contents.
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Ian C Ender from Bothell, WA, age ~41 Get Report