Husam M Gaffur

55788556, Nov 26, 1996

Apr 26, 1995

8/429182

Husam Gaffur - San Jose CA
Sukyoon Yoon - Sunnyvale CA

National Semiconductor Corporation - Santa Clara CA

H01L 2976
H01L 21265

257371

A low-voltage 0. 8-micron CMOS process is modified by implanting arsenic or phosphorus during epitaxy in a p-type substrate starting material to increase the depth of selected n-well areas for the purpose of producing high-voltage transistors on the same substrate in the same CMOS process. Implanting boron in a p-field extension area in a manner which minimizes the dopant in the adjacent field oxide achieves a similar result. That is, breakdown and punch-through voltages are increased. Together, these make CMOS transistors which operate at a higher voltage range than either innovation alone.

57897867, Aug 4, 1998

Nov 25, 1996

8/756004

Husam Gaffur - San Jose CA
Sukyoon Yoon - Sunnyvale CA

National Semiconductor Corporation - Santa Clara CA

H01L 2972

257369

A low-voltage 0. 8-micron CMOS process is modified by implanting arsenic or phosphorus during epitaxy in a p-type substrate starting material to increase the depth of selected n-well areas for the purpose of producing high-voltage transistors on the same substrate in the same CMOS process. Implanting boron in a p-field extension area in a manner which minimizes the dopant in the adjacent field oxide achieves a similar result. That is, breakdown and punch-through voltages are increased. Together, these make CMOS transistors which operate at a higher voltage range than either innovation alone.