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Fernando J Pizzano

from Poughkeepsie, NY
Age ~51
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Also known as:
Rouiller F Pizzano, Jouquin Fernando, Fernando Jouquin
Related to:
Fernando R Diaz, 72
Connected to:
Carmen J Pizzano, 75Charles Pizzarello, 71Guy A Pizzarello, 64John G Pizzarella, 60Louis R Pizzarello, 91Rocco J Pizzarelli, 94Sandra L Pizzarusso, 61Sarah A Pizzaruso, 49Janet Pizzelanti, 74Benny Pizzelli, 56

Fernando Pizzano Phones & Addresses

  • Poughkeepsie, NY
  • Danbury, CT
  • Brookfield, CT
  • 118 Ridgeline Dr, Poughkeepsie, NY 12603 (203) 826-5620

Work

Position: Professional/Technical

Education

Degree: Graduate or professional degree

Resumes

Resumes

Fernando Pizzano Photo 1

Senior Technical Staff Member

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Location:
Poughkeepsie, NY
Industry:
Information Technology And Services
Work:
Ibm
Senior Technical Staff Member
Ibm May 2012 - Dec 2018
Senior Engineer
Skills:
Shell Scripting
Unix
Linux
Distributed Systems
Software Development
Integration
System Architecture
Enterprise Architecture
It Strategy
Virtualization
Cloud Computing
Agile Methodologies
Software Project Management
Fernando Pizzano Photo 2

Compras Transversales

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Location:
Poughkeepsie, NY
Industry:
Oil & Energy
Work:
Avon Nov 2015 - Mar 2019
Indirect Senior Purchaser Agent
Aesa (A-Evangelista Sa) Nov 2015 - Mar 2019
Compras Transversales
Unilever Sep 2014 - Mar 2015
Ingeniero De Proyectos
Gerresheimer Apr 2012 - Aug 2014
Responsable De Compras and Purchasing Responsible
Soldamig 2008 - 2011
Responsable De Operaciones
Education:
Universidad Tecnologica Nacional 2004 - 2013
Universidad Tecnologica Nacional 1998 - 2003
Skills:
Autocad
Team Leadership
English
Lean Manufacturing
Engineering
Logistics
Supply Chain Management
Iso
Microsoft Excel
Ms Project
Planificacion De La Produccion
Mrp
Gestion De Proyectos
Mejora Continua
Negotiation
Analysis
Supply Chain
Microsoft Office
Project Planning
Teamwork
Continuous Improvement
Microsoft Project
Purchasing
Iso Standards
Activos Fijos
Empresas
Microsoft Word
Languages:
Spanish
English

Publications

Us Patents

Dynamic Re-Allocation Of Signal Lanes

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US Patent:
20190243797, Aug 8, 2019
Filed:
Apr 22, 2019
Appl. No.:
16/390738
Inventors:
- Armonk NY, US
Daniel E. Hurlimann - Austin TX, US
Chetan Mehta - Austin TX, US
Fernando Pizzano - Poughkeepsie NY, US
Thomas R. Sand - Rochester MN, US
International Classification:
G06F 13/40
G06F 13/42
Abstract:
A computer-implemented method determines that a link operation associated with a first link, among the set of interface links in a computing system, has resulted in a first set of signal lanes, included in the first link, becoming unused. The method further includes determining a link configuration and selecting, based on the link configuration, a second link from among the interface links, and determining a second set of signal lanes, from among the unused signal lanes included in the first link, to include in the second link. The signal lanes to include in the second link are based on an attribute associated with the second link. The method further includes dynamically reconfiguring the signal lanes included in the second to set to be included in the lanes in the second link. Some computing systems include a lane routing device connected to signal lanes of links among the interface links.

Dynamic Address Translation Table Allocation

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US Patent:
20180232317, Aug 16, 2018
Filed:
Apr 13, 2018
Appl. No.:
15/953226
Inventors:
- Armonk NY, US
Daniel E. Hurlimann - Austin TX, US
Chetan Mehta - Austin TX, US
Travis J. Pizel - Rochester MN, US
Fernando Pizzano - Poughkeepsie NY, US
Thomas R. Sand - Rochester MN, US
International Classification:
G06F 12/1027
G06F 12/1081
G06F 9/455
G06F 12/1009
Abstract:
A system and method dynamically allocate address translation tables for direct memory access windows by donating logical memory blocks to allocate to the address translation tables. A dynamic address translation table allocation module dynamically changes the allocation of memory to the address translation tables without a platform or partition reboot. A portion of the dynamic address translation table allocation module may reside in the hypervisor and in the partition and communicate to dynamically allocate memory to the address translation tables. The dynamic address translation table allocation module in the partition may donate logical memory blocks to the hypervisor to increase the allocation of memory to the address translation tables.

Dynamic Address Translation Table Allocation

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US Patent:
20180113813, Apr 26, 2018
Filed:
Jun 26, 2017
Appl. No.:
15/632639
Inventors:
- Armonk NY, US
Daniel E. Hurlimann - Austin TX, US
Chetan Mehta - Austin TX, US
Travis J. Pizel - Rochester MN, US
Fernando Pizzano - Poughkeepsie NY, US
Thomas R. Sand - Rochester MN, US
International Classification:
G06F 12/1027
G06F 12/1081
G06F 12/1009
G06F 9/455
Abstract:
A system and method dynamically allocate address translation tables for direct memory access windows by donating logical memory blocks to allocate to the address translation tables. A dynamic address translation table allocation module dynamically changes the allocation of memory to the address translation tables without a platform or partition reboot. A portion of the dynamic address translation table allocation module may reside in the hypervisor and in the partition and communicate to dynamically allocate memory to the address translation tables. The dynamic address translation table allocation module in the partition may donate logical memory blocks to the hypervisor to increase the allocation of memory to the address translation tables.

Dynamic Re-Allocation Of Signal Lanes

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US Patent:
20180060266, Mar 1, 2018
Filed:
Aug 30, 2016
Appl. No.:
15/251097
Inventors:
- Armonk NY, US
Daniel E. Hurlimann - Austin TX, US
Chetan Mehta - Austin TX, US
Fernando Pizzano - Poughkeepsie NY, US
Thomas R. Sand - Rochester MN, US
International Classification:
G06F 13/40
G06F 13/42
Abstract:
A computer-implemented method determines that a link operation associated with a first link, among the set of interface links in a computing system, has resulted in a first set of signal lanes, included in the first link, becoming unused. The method further includes determining a link configuration and selecting, based on the link configuration, a second link from among the interface links, and determining a second set of signal lanes, from among the unused signal lanes included in the first link, to include in the second link. The signal lanes to include in the second link are based on an attribute associated with the second link. The method further includes dynamically reconfiguring the signal lanes included in the second to set to be included in the lanes in the second link. Some computing systems include a lane routing device connected to signal lanes of links among the interface links.

Switching Allocation Of Computer Bus Lanes

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US Patent:
20170153949, Jun 1, 2017
Filed:
Dec 1, 2015
Appl. No.:
14/955766
Inventors:
- Armonk NY, US
Daniel E. Hurlimann - Austin TX, US
Chetan Mehta - Austin TX, US
Fernando Pizzano - Poughkeepsie NY, US
Thomas R. Sand - Rochester MN, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 11/14
G06F 13/38
G06F 13/40
G06F 13/16
G06F 11/30
G06F 11/22
Abstract:
The embodiments relate to dynamically allocating lanes of a computer bus. A computer system is configured with a plurality of connectors in communication with a module, with each connector configured to receive a respective adapter. The module detects a presence of each primary and backup adapter present, and controls an initial allocation of lanes to each detected primary adapter for maximizing adapter functionality. After the initial allocation and in response to detecting a failure of at least one primary adapter, the module dynamically switches lanes from the failed adapter to at least one of the one or more remaining primary adapters and the backup adapter.

Dynamic Allocation Of Computer Bus Lanes

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US Patent:
20170153989, Jun 1, 2017
Filed:
Dec 1, 2015
Appl. No.:
14/955739
Inventors:
- Armonk NY, US
Daniel E. Hurlimann - Austin TX, US
Chetan Mehta - Austin TX, US
Fernando Pizzano - Poughkeepsie NY, US
Thomas R. Sand - Rochester MN, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 13/16
G06F 13/42
G06F 13/40
Abstract:
The embodiments relate to dynamically allocating lanes of a computer bus. A computer system having a processor in communication with a module is booted. Allocation of lanes among adapters in communication with connectors of the computer bus is controlled, which includes the module controlling an allocation of the lanes to adapters present at boot-time. The allocation is dynamic and functions to maximize lane allocation and functionality for the detected adapters.

Dynamic Re-Allocation Of Computer Bus Lanes

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US Patent:
20170154000, Jun 1, 2017
Filed:
Dec 1, 2015
Appl. No.:
14/955805
Inventors:
- Armonk NY, US
Daniel E. Hurlimann - Austin TX, US
Chetan Mehta - Austin TX, US
Fernando Pizzano - Poughkeepsie NY, US
Thomas R. Sand - Rochester MN, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 13/40
G06F 13/38
G06F 13/42
G06F 13/16
Abstract:
The embodiments relate to dynamically re-allocating lanes of a computer bus. A computer system is configured with a plurality of connectors in communication with a module, with each connector configured to receive a respective adapter. The module detects a presence of each adapter and controls an initial allocation of lanes to each detected adapter for maximizing adapter functionality. After the initial allocation and in response to performance evaluation, the module dynamically switches lanes from the among the adapters, including allocation of available lane, upshifting lane allocation to one or more adapters, and/or downshifting lane allocation to one or more adapters.

Dynamic Re-Allocation Of Computer Bus Lanes

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US Patent:
20170154008, Jun 1, 2017
Filed:
Dec 1, 2015
Appl. No.:
14/956373
Inventors:
- Armonk NY, US
Daniel E. Hurlimann - Austin TX, US
Chetan Mehta - Austin TX, US
Fernando Pizzano - Poughkeepsie NY, US
Thomas R. Sand - Rochester MN, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 13/42
G06F 13/16
G06F 13/40
Abstract:
The embodiments relate to dynamically re-allocating lanes of a computer bus. A computer system having a processor in communication with a module is booted. Allocation of lanes among adapters in communication with connectors of the computer bus is controlled at boot-time and, in response to detection of an additional adapter received after boot-time, an additional allocation of lanes to the additional adapter is dynamically controlled. The additional allocation includes allocating unallocated lanes to the additional adapter, and re-allocating at least one lane from the initial allocation in response to the unallocated lanes being insufficient.
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Fernando J Pizzano from Poughkeepsie, NY, age ~51 Get Report