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Edmund Law Phones & Addresses

  • Irvine, CA
  • Ladera Ranch, CA
  • Santa Clara, CA
  • Redwood City, CA
  • Brighton, MA
  • Chandler, AZ
  • San Jose, CA
  • 203 Rodonovan Dr, Santa Clara, CA 95051

Work

Company: Broadcom Mar 2015 to Nov 2017 Position: Manager, package engineering operations and central engineering

Education

Degree: Bachelor of Engineering, Bachelors School / High School: Boston University 1992 to 1996

Skills

Semiconductors • Semiconductor Industry • Ic • Failure Analysis • Engineering Management • Asic • Manufacturing • Mixed Signal • Product Engineering • Cross Functional Team Leadership • Integrated Circuits • Design of Experiments • Electronics • Spc • Soc

Emails

Industries

Wireless

Resumes

Resumes

Edmund Law Photo 1

Chip Packaging Technologist

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Location:
130 Bravo, Irvine, CA
Industry:
Wireless
Work:
Broadcom Mar 2015 - Nov 2017
Manager, Package Engineering Operations and Central Engineering

Movandi Mar 2015 - Nov 2017
Chip Packaging Technologist

Broadcom 2010 - Jun 2017
Senior Principal Engineer

Broadcom 2002 - 2010
Ic Packaging and Assembly Manager

Asat 1996 - 2002
Director of Advanced Package Design
Education:
Boston University 1992 - 1996
Bachelor of Engineering, Bachelors
Skills:
Semiconductors
Semiconductor Industry
Ic
Failure Analysis
Engineering Management
Asic
Manufacturing
Mixed Signal
Product Engineering
Cross Functional Team Leadership
Integrated Circuits
Design of Experiments
Electronics
Spc
Soc

Business Records

Name / Title
Company / Classification
Phones & Addresses
Edmund Law
Manager
Asat Inc
Electronic Parts and Equipment
46335 Landing Pkwy, Fremont, CA 94538
Edmund Law
Managing
3TEE International, LLC
Retail Sales · Business Services at Non-Commercial Site
169 Metropolitan Dr, Milpitas, CA 95035
Edmund Law
Manager
Asat Inc
Other Electronic Parts and Equipment Merchant Wholesalers
46335 Lndg Pkwy, Fremont, CA 94538
(510) 413-4800
Edmund Law
Manager
Asat Inc
Electronic Parts and Equipment
46335 Landing Pkwy, Fremont, CA 94538

Publications

Wikipedia

Edmund Law

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Edmund Law (6 June 1703 14 August 1787) was a priest in the Church of England. He served as Master of Peterhouse, Cambridge, as Knightbridge Professor ...

Isbn (Books And Publications)

An Enquiry into the Ideas of Space, Time, Immensity, and Eternity: 1734

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Author

Edmund Law

ISBN #

0824017838

Us Patents

Method And System For Innovative Substrate/Package Design For A High Performance Integrated Circuit Chipset

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US Patent:
7867816, Jan 11, 2011
Filed:
Apr 24, 2006
Appl. No.:
11/409107
Inventors:
Edmund Law - Santa Clara CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H01L 21/00
US Classification:
438106, 438107, 438118, 438123, 257700, 257766, 257774, 257633, 257632, 361794, 361 77, 361778
Abstract:
Provided is a method and system for designing an integrated circuit (IC) substrate, the substrate being formed to include at least one die. The method includes providing at least portions of IC power and a grounding function on a metal 2 substrate layer and utilizing all of a metal 3 substrate layer for the grounding function. Portions of the metal 2 layer and a metal 4 layer are utilized for the IC power, wherein all of the IC power is centralized underneath the die.

Method And System For Innovative Substrate/Package Design For A High Performance Integrated Circuit Chipset

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US Patent:
8237262, Aug 7, 2012
Filed:
Dec 8, 2010
Appl. No.:
12/963465
Inventors:
Edmund Law - Santa Clara CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H01L 23/043
US Classification:
257708, 257700, 257766, 257774, 257633, 257632, 438123, 438106, 438107, 438118, 361794, 361777, 361778
Abstract:
Provided is a method and system for designing an integrated circuit (IC) substrate, the substrate being formed to include at least one die. The method includes providing at least portions of IC power and a grounding function on a metal substrate layer and utilizing all of a metal substrate layer for the grounding function. Portions of the metal layer and a metal layer are utilized for the IC power, wherein all of the IC power is centralized underneath the die.

Integrated Circuit Package Having Reversible Esd Protection

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US Patent:
20090134902, May 28, 2009
Filed:
Nov 28, 2007
Appl. No.:
11/946509
Inventors:
Edmund Law - Santa Clara CA, US
Assignee:
BROADCOM CORPORATION - Irvine CA
International Classification:
G01R 31/26
H01L 23/58
H01L 21/58
US Classification:
324765, 257 48, 438106, 257E23002, 257E21505
Abstract:
Methods, systems, and apparatuses are provided for integrated circuit packages and for enabling electrostatic discharge (ESD) testing of the same. A package includes an integrated circuit chip, a substrate, a first electrically conductive trace, and a second electrically conductive trace. The substrate includes a first electrically conductive region and a second electrically conductive region. The first region is coupled to a first ground signal of the chip, and the second region is coupled to a second ground signal of the chip. The first trace is coupled to the first region and the second trace is coupled to the second region. A portion of the first trace is proximate to a portion of the second trace. An electrically conductive material may be deposited to electrically couple the first and second traces to enable ESD protection testing of the package.
Edmund L Law from Irvine, CA, age ~49 Get Report