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Douglas L Chaffee

from New Martinsville, WV
Age ~72
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Also known as:
Douglas Leslie Chaffee, Douglas L Chafee, Douglas L Chaffe, Douglas L Chaffer, Doug Chaffee
Related to:
Micelle Jo Haydel, 61Jonathan ChaffeeJennifer ChaffeeMary Chaffee, 43Willard Decory, 48Rachel Decory, 44
Connected to:
Ajoulyn M Chaffee, 41Brittany E Chaffee, 37Chet Chaffee, 71Deanna J Chaffee, 87Debora Chaffee, 64Delores Chaffee, 64Donald L Chaffee, 83Eliot J Chaffee, 38Elizabeth J Chaffee, 74Glenn B Chaffee, 44

Douglas Chaffee Phones & Addresses

  • New Martinsville, WV
  • McKenna, WA
  • Mesa, AZ
  • Roy, WA
  • Eatonville, WA
  • Yelm, WA
  • Soldotna, AK
  • Thornton, WA

Resumes

Resumes

Douglas Chaffee Photo 1

Owner

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Location:
P/O Box 344, Mckenna, WA
Industry:
Retail
Work:

Owner
Douglas Chaffee Photo 2

Douglas Chaffee

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Douglas Chaffee Photo 3

Douglas Chaffee

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Business Records

Name / Title
Company / Classification
Phones & Addresses
Douglas B. Chaffee
President
Chaffee & Marshall, A Professional Corporation

Publications

Us Patents

Program Memory Source Switching For High Speed And/Or Low Power Program Execution In A Digital Processor

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US Patent:
20070094454, Apr 26, 2007
Filed:
Oct 20, 2005
Appl. No.:
11/254373
Inventors:
Steven Brundula - Chandler AZ, US
Randy Yach - Phoenix AZ, US
Sam Alexander - Phoenix AZ, US
Mike Pyska - Phoenix AZ, US
Douglas Chaffee - Queen Creek AZ, US
International Classification:
G06F 13/00
US Classification:
711154000
Abstract:
An integrated circuit digital processor is coupled to either a main program memory or a secondary program memory, wherein the secondary program memory may be low power, high reliability, non-volatile and/or fast memory that may store a limited number of critical program instructions and data for execution by the digital processor. A program memory switch may couple the digital processor to either the main program memory or the secondary program memory. This is particularly advantageous in that the secondary program memory may have attributes not economically feasible with the main program memory. A program memory controller may handle the selection of which of these memories that the digital processor is using to obtain its program instructions, and necessary control signals for switching and operation thereof.

Time Signal Peripheral

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US Patent:
20050141648, Jun 30, 2005
Filed:
Dec 24, 2003
Appl. No.:
10/746590
Inventors:
Ruan Lourens - Chandler AZ, US
Douglas Chaffee - Queen Creek AZ, US
International Classification:
H04L027/06
H03D001/00
US Classification:
375340000
Abstract:
A time signal peripheral may include a radio receiver, decoder/demodulator and time registers. The time signal peripheral may receive, detect and store time information from time signals, e.g., WWV, WWVH, WWVB (USA), JJY (Japan), MSF (UK) and the like. The time information may be used for a self setting clock, and the clock may be used as a reference in time sensitive applications, devices and systems. A digital processor may be coupled to and control the time signal peripheral. The digital processor may be used to decode the time information in the received time signal, store the decoded time information and make the time information available for use by a device and/or system, or the time signal peripheral may do these functions, allowing the digital processor to be used for higher level applications. The time signal peripheral may be fabricated on an integrated circuit die with or without the digital processor. The time signal peripheral and the digital process may be on a separate integrated circuit dice and be packaged together in a signal integrated circuit package.
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Douglas L Chaffee from New Martinsville, WV, age ~72 Get Report