Inventors:
Dilip K. Bhavsar - Liverpool NY
Assignee:
General Electric Company - Syracuse NY
International Classification:
G01R 3128
Abstract:
A built-in test system employs dual-mode feedback shift registers to supply test vectors and evaluate test responses of functional and interface networks of a logic system. Test responses are supplied to a quotient bit compressor which generates a system response signature for comparison with an expected fault-free signature to produce a system pass/fail status signal.