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Dhiraj Sogani Phones & Addresses

  • Austin, TX
  • 735 Overture Ct, San Jose, CA 95134
  • 6453 Oberlin Way, San Jose, CA 95123 (408) 629-1036
  • Hendersonville, TN
  • Milpitas, CA
  • Mountain View, CA
  • Fremont, CA

Work

Company: Silicon labs Apr 2020 Position: General manager, wi-fi products

Education

Degree: Master of Business Administration, Masters School / High School: Santa Clara University 2005 to 2006

Skills

Wireless • Semiconductors • Embedded Systems • Business Development • Product Marketing • Eda • Electronics • Embedded Software • Product Management • Wifi • Asic • Soc • Product Development • Strategic Partnerships • Pre Sales • Wireless Technologies • Electronic System Design • Executive Management • Manufacturing Operations Management • Bluetooth • Ic

Interests

Children • Education • Poverty Alleviation • Disaster and Humanitarian Relief • Human Rights • Health

Industries

Wireless

Resumes

Resumes

Dhiraj Sogani Photo 1

General Manager, Wi-Fi Products

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Location:
San Jose, CA
Industry:
Wireless
Work:
Silicon Labs
General Manager, Wi-Fi Products

Wi2Wi, Inc. Nov 2005 - Nov 2008
General Manager and Senior Vice President, Advanced Technologies

Redpine Signals Nov 2005 - Nov 2008
General Manager and Senior Vice President, Systems Business Unit at Redpine Signals, Inc

Sequence Design Dec 1998 - Nov 2005
Vice President, Marketing and Applications

The Iconic Nov 2003 - Feb 2005
Co-Founder and Vice President, Marketing and Engineering
Education:
Santa Clara University 2005 - 2006
Master of Business Administration, Masters
University of California, Berkeley 1997 - 1998
Indian Institute of Technology, Delhi 1988 - 1992
Bachelor of Science, Bachelors, Bachelor of Technology
St. Paul's School
Skills:
Wireless
Semiconductors
Embedded Systems
Business Development
Product Marketing
Eda
Electronics
Embedded Software
Product Management
Wifi
Asic
Soc
Product Development
Strategic Partnerships
Pre Sales
Wireless Technologies
Electronic System Design
Executive Management
Manufacturing Operations Management
Bluetooth
Ic
Interests:
Children
Education
Poverty Alleviation
Disaster and Humanitarian Relief
Human Rights
Health

Business Records

Name / Title
Company / Classification
Phones & Addresses
Dhiraj Sogani
General Manager And Senior Vice President System Business Unit
REDPINE SIGNALS, INC
Fabless Semiconductor Co
2107 N 1 St SUITE 680, San Jose, CA 95131
(408) 748-3385

Publications

Us Patents

Built-In-Self-Repair Arrangement For A Single Multiple-Integrated Circuit Package And Methods Thereof

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US Patent:
8055966, Nov 8, 2011
Filed:
Dec 17, 2007
Appl. No.:
11/958284
Inventors:
Dhiraj Sogani - San Jose CA, US
Assignee:
Wi2Wi, Inc. - San Jose CA
International Classification:
G01R 31/3187
G01R 31/40
US Classification:
714733, 714718
Abstract:
A multiple integrated circuit arrangement within a single package is provided. The multiple integrated circuit arrangement includes a set of electronic components, which includes at least a set of dies. The first die of the set of dies is coupled to a first electronic component of the set of electronic components, wherein the first electronic component is not the first die. The arrangement includes a built-in-self-test (BIST) arrangement, which is at least partly encapsulated within the single package, wherein the BIST arrangement is configured for at least testing the first die of the set of dies. The arrangement also includes a built-in-self-repair (BISR) arrangement, which is at least partly encapsulated within the single package, wherein the BISR arrangement is configured for at least repairing the multiple integrated circuit arrangement.

Modified Electrostatic Discharge Arrangement Within A Single Multiple-Integrated Circuit Package

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US Patent:
8587069, Nov 19, 2013
Filed:
Apr 16, 2008
Appl. No.:
12/104349
Inventors:
Dhiraj Sogani - San Jose CA, US
Assignee:
Wi2Wi, Inc. - San Jose CA
International Classification:
H01L 23/62
US Classification:
257355, 257360, 257713
Abstract:
A single package arrangement is provided. The arrangement includes a set of electronic components. The arrangement also includes a set of input/output (I/O) cells, which is encapsulated within the set of electronic components. The arrangement further includes a set of electrostatic discharge (ESD) arrangements. Each ESD arrangement of the set of ESD arrangements is configured for at least coupling with an I/O cell of the set of I/O cells and protecting the I/O cell from the electrostatic discharge using a set of ESD constructs. The set of ESD constructs includes at most two non-configurable ESD constructs to protect the I/O cell from the electrostatic discharge.

Built-In-Self-Test Arrangement For A Single Multiple-Integrated Circuit Package And Methods Thereof

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US Patent:
7795894, Sep 14, 2010
Filed:
Dec 17, 2007
Appl. No.:
11/958290
Inventors:
Dhiraj Sogani - San Jose CA, US
Assignee:
Wi2Wi, Inc. - San Jose CA
International Classification:
G01R 31/02
US Classification:
324763, 324765, 714733
Abstract:
A multiple integrated circuit arrangement within a single package is provided. The arrangement includes a set of dies, which is encapsulated within the single package. The arrangement also includes a built-in-self-test (BIST) arrangement, which is at least partly encapsulated within the single package. The BIST arrangement is configured for at least performing a test on at least a first die of the set of dies.
Dhiraj Sogani from Austin, TX, age ~52 Get Report