Daniel S Gubaton

2065 White Birch Dr, Vista, CA 92081

Wireless

Qualcomm
Support Engineer, Staff
Qualcomm Apr 1, 2015 - Nov 2017
Support Engineer, Senior
Qualcomm Feb 2013 - Apr 2015
Support Engineer
Hughes Circuits Apr 2011 - Feb 2013
Printed Circuit Board Layout Engineer
L-3 Communications Jul 2009 - Dec 2009
Associate Electrical and Power Engineer Intern

The Collins College of Hospitality Management at Cal Poly Pomona 2007 - 2010
Bachelors, Bachelor of Science, Electrical Engineering Palomar College 2004 - 2007

Pcb Design
Spectrum Analyzer
Circuit Design
Electronics
Electrical Engineering
Schematic Capture
Analog
Matlab
Analog Circuit Design
Pspice
Oscilloscope
Orcad
Manufacturing
Verilog
Altium Designer
Soldering
Network Analyzer
Simulations
Multimeter
Xilinx
Troubleshooting
Vhdl
Microcontrollers
Semiconductors
Rf
Cadence

Hughes Circuits, Inc

Apr 2011 to 2000
Printed Circuit Board Layout Engineer
L-3 Communications, Power Paragon Division
Anaheim, CA
Jul 2009 to Dec 2009
Associate Electrical and Power Engineer Intern

California State Polytechnic University, College of Engineering
Pomona, CA
2007 to 2010
Bachelor of Science in Electrical Engineering
Palomar College
San Marcos, CA
2004 to 2007
Associate in Arts in Liberal Arts and Sciences
Palomar College
San Marcos, CA
2004 to 2007
Associate in Arts in Science and Mathematics

Software: Microsoft Office, Matlab, PSPICE, Power Systems Computer Aided Design, Orcad, Cadence Allegro PCB Designer, Mentor Graphics PADS Layout, PADS Logic, PADS Router. Programming: Assembly Language, C, C#, C++, Java, Matlab, and Verilog. Hardware: Xilinx Spartan3E, 68HC11 Microcontroller, 68000 Microprocessor, PIC-32 Microprocessor, XBee. Spectrum Analyzer, Digital Volt Meter, Signal Generator, and Agilent HP Analog & Digital Oscilloscopes. Methodology: PCB Layout, GUI, RS-232, and Schematic Capture. Daniel Gubaton