US Patent:
20130162457, Jun 27, 2013
Inventors:
Daibashish Gangopadhyay - Seattle WA, US
David Allstot - Seattle WA, US
Assignee:
University of Washington through its Center for Communications - Seattle WA
International Classification:
H03M 1/12
H03M 1/38
Abstract:
Disclosed herein are example methods, systems, and devices for compressed sensing analog to digital conversion. In an example embodiment, a multiplication circuit is configured to multiply an input signal with a measurement signal to produce a multiplied signal, where the measurement signal includes data from a column of a measurement matrix. The measurement matrix may be generated by a linear feedback shift register (LFSR)-based measurement-matrix generator. An integration circuit may be coupled to the multiplication circuit and configured to integrate the multiplied signal for a predefined amount of time to produce an integrated signal. An analog to digital converter (ADC) circuit may be coupled to the integration circuit and configured to (i) sample the integrated signal and (ii) produce an output signal comprising at least one sample of the integrated signal. Among other benefits of the disclosure herein, a column-wise multiplication of the input signal with the measurement signal enables an efficient compressed-sensing analog-to-digital conversion architecture.