Chi Yan Chan

7505506, Mar 17, 2009

Feb 25, 2005

11/067148

Goran Djuknic - Tenafly NJ, US
Chi Chiu Chan - Wayne NJ, US
Robert W. Smid - Wyckoff NJ, US

ITT Manufacturing Enterprises, Inc. - Wilmington DE

H04B 1/00

375130, 375260, 375272, 375285, 375343, 370319, 370320, 370321, 370330, 370335, 370342, 370345, 370347, 342150, 342151, 342152, 342153, 342154, 342155, 333193, 333194, 333195, 333196

A method of generating a composite signal includes the steps of: (a) generating a plurality of sub-carriers, each sub-carrier having a different frequency position in a frequency spectrum; (b) generating a plurality of codes; and (c) forming a plurality of code combinations from the plurality of codes generated in step (b). The method also includes the steps of (d) first modulating each sub-carrier using a respective one of the code combinations formed in step (c) to form a plurality of modulated sub-carriers; and (e) second modulating in-phase and quadrature components of a base carrier using the plurality of modulated sub-carriers to form the composite signal having multiple carriers. The composite signal is a constant envelope signal, and a single sideband signal.

7590756, Sep 15, 2009

May 13, 2005

11/128355

Chi Chiu Chan - Wayne NJ, US

ITT Manufacturing Enterprises, Inc. - Wilmington DE

G06F 15/173

709238, 709239, 709240, 370225, 370228, 370231, 370235, 370237, 370390, 370389, 370392

A communication node of the present invention automatically transmits original and duplicate packets over different paths in a communications network to improve delivery reliability of the packet and to decrease packet delivery time. A packet is typically marked for reliable transmission by the application layer of a source node, while a routing agent module within the node IP layer processes the marked packets. The marked packets are transmitted over redundant (e. g. , primary and secondary) network paths from the source node to the destination node. The primary path is usually the shortest path between the source and destination nodes, while the secondary path is selected to avoid overlap with the primary path. The application or transport layer of the destination node filters or removes plural copies of received packets.

7673201, Mar 2, 2010

Mar 12, 2009

12/402728

Chi Bun Chan - San Jose CA, US
Jingzhao Ou - Sunnyvale CA, US

XILINX, Inc. - San Jose CA

G01R 31/28
G06F 7/38
H03K 19/00

714725, 714731, 326 40, 716 17

A method of restoring a selected operational state of a circuit design implemented within a programmable integrated circuit (IC) can include pipelining a clock gating signal that selectively pauses a clock of the circuit design, and storing configuration data specifying an operational state of the circuit design at a first simulation clock cycle in non-configuration memory. At a second simulation clock cycle, the clock of the circuit design can be gated. The stored configuration data can be loaded into configuration memory of the programmable IC, wherein loading the configuration data reconfigures the circuit design and restores the operational state of the circuit design in existence at the first simulation clock cycle. The clock of the circuit design can be advanced a number of clock cycles corresponding to a difference between the second simulation clock cycle and the first simulation clock cycle.

7746099, Jun 29, 2010

Jan 11, 2008

12/008489

Chi Bun Chan - San Jose CA, US
Nabeel Shirazi - San Jose CA, US

Xilinx, Inc. - San Jose CA

H03K 19/173

326 38, 326 8

A method of implementing a circuit in a device having programmable logic is disclosed. The method comprises implementing a circuit in the programmable logic of the device; storing data in a block of random access memory; performing a partial reconfiguration of the device, where new data is stored in the block of random access memory; and accessing the new data. A system of implementing a circuit in a device having programmable logic is also disclosed.

7747423, Jun 29, 2010

Sep 27, 2006

11/527841

Nabeel Shirazi - San Jose CA, US
Jonathan B. Ballagh - Boulder CO, US
Chi Bun Chan - Longmont CO, US

Xilinx, Inc. - San Jose CA

G06F 17/50

703 13, 703 14

Systems and methods of performing co-simulation of a partitioned circuit design using multiple programmable logic devices (PLDs) coupled together to form a boundary scan chain. A host computer is coupled to the scan chain via a programming cable. Resident on the host computer are run-time co-simulation blocks corresponding to blocks from the circuit design, where each block is designated to run on one of the PLDs in the scan chain; a programming cable device driver interfacing with the programming cable; and a proxy component. The proxy component is coupled to all of the run-time co-simulation blocks and the programming cable device driver. Each co-simulation block includes a unique pattern identifier, which is also present in the associated PLD. Using this pattern identifier, data and commands targeted to a specific PLD can be extracted from the scan chain, while ignoring data and commands targeted to other PLDs in the scan chain.

7787450, Aug 31, 2010

Oct 11, 2006

11/545587

Chi Chiu Chan - Wayne NJ, US
Amit Patel - Edison NJ, US

ITT Manufacturing Enterprises, Inc - Wilmington DE

H04L 12/28

370389, 370236, 370238

An efficient network formation technique for mobile ad-hoc wireless networks according to the present invention overcomes bandwidth overhead due to generation of database update or Link State Advertisement (LSA) messages in response to changes in certain parameters (e. g. , node group size, etc. ) with respect to both single and plural node group scenarios. The present invention controls flooding of LSA messages triggered by changes in these parameters (e. g. , node group size), thereby reducing overhead traffic during network start-up. This is achieved without impact on message delivery capability and group merge operations. After network start-up is complete and the network is formed, the present invention continues to reduce LSA flooding in a mobile scenario when radios or nodes move into and out of range with one another.

7852109, Dec 14, 2010

Dec 15, 2008

12/335466

Chi Bun Chan - San Jose CA, US
Jingzhao Ou - Sunnyvale CA, US

Xilinx, Inc. - San Jose CA

H03K 19/00

326 16, 326 47, 326 93

A method and apparatus involves operating a circuit having a test circuit interrupt input terminal (INTERRUPT), having a test circuit clock output terminal (DUT_CLK), and having first and second operational modes. In the first operational mode the circuit supplies a test circuit clock signal to the test circuit clock output terminal. The circuit responds to receipt of an occurrence of a test circuit interrupt at the test circuit interrupt input terminal by then operating in the second operational mode. In the second operational mode the circuit refrains from supplying the test circuit clock signal to the test circuit clock output terminal.

7860151, Dec 28, 2010

Apr 10, 2007

11/786259

Goran Djuknic - Tenafly NJ, US
Chi Chiu Chan - Wayne NJ, US

ITT Manufacturing Enterprises, Inc. - Wilmington DE

H04B 1/00

375146, 375135, 375260, 375295

A method of generating a multicarrier spread spectrum signal having a constant envelope includes partitioning multiple spreading codes into at least a first portion of spreading codes and a second portion of spreading codes. First and second modulating signals, respectively, are formed from the first and second portions of spreading codes. A first carrier spread spectrum signal is modulated with the first modulating signal to form a first modulated carrier signal, and a second carrier spread spectrum signal is modulated with the second modulating signal to form a second modulated carrier signal. The first and second modulated carrier signals are summed to form the multicarrier spread spectrum signal. The method includes combining spreading codes from the multiple spreading codes using majority voting logic to form the first and second portions of spreading codes.