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Benoit J Meister

from San Diego, CA
Age ~46
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Also known as:
Benoit Jean Meister
Related to:
Karen Gale Strauss, 76Ludvigs J StraussAleksandra M Strauss, 42Andrejs V Strauss, 52Pamela M Berman, 52Christine Strauss, 75Erika A Strauss, 46Andrejs V Strauss, 78
Connected to:
Adrian L Meister, 99Aiden S Meister, 35Alvin Meister, 85Angela M Meisterics, 45Benjamin A Meister, 42Boris Meister, 102Brooke M Meister, 30Christopher E Meister, 63Collin L Meister, 47Crystal D Meister, 41

Benoit Meister Phones & Addresses

  • San Diego, CA
  • Denver, CO
  • 270 W 119Th St APT 4E, New York, NY 10026
  • Brooklyn, NY
  • 204 W 94Th St APT 4A, New York, NY 10025

Work

Company: Reservoir labs 2010 Position: Managing research engineer

Education

Degree: Doctor of Philosophy (Ph.D.) School / High School: University of Strasbourg 2001 to 2004 Specialities: Computer Science

Skills

High Performance Computing • Computer Science • Parallel Computing • C • Algorithms • Distributed Systems • Computer Architecture • Software Engineering • C++ • Parallel Programming • Java • Latex • Python • Programming • Mpi • Compilers • Compiler Optimization • Linux • C++ Language • Linear Algebra • Linear Programming • Machine Learning • Research • Array Languages • Prolog • Management • Agile Project Management • Agile Testing • Parallel Runtimes • Adaptive Optimization • Cuda • Opencl • Openmp • Payment Systems • Software Development

Industries

Research

Resumes

Resumes

Benoit Meister Photo 1

Fellow, Managing Research Engineer

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Location:
Denver, CO
Industry:
Research
Work:
Reservoir Labs since 2010
Managing Research Engineer
CJC since 2002
Member
Reservoir Labs, Inc. Oct 2005 - Jul 2010
Senior Engineer
Vérimag 2005 - 2005
Visiting researcher
Université de Strasbourg 2001 - 2004
PhD Candidate - T.A.
Education:
University of Strasbourg 2001 - 2004
Doctor of Philosophy (Ph.D.), Computer Science University of Strasbourg 1998 - 2001
MS, Computer science University of Strasbourg 1996 - 1998
Bachelor's degree, Physics
Skills:
High Performance Computing
Computer Science
Parallel Computing
C
Algorithms
Distributed Systems
Computer Architecture
Software Engineering
C++
Parallel Programming
Java
Latex
Python
Programming
Mpi
Compilers
Compiler Optimization
Linux
C++ Language
Linear Algebra
Linear Programming
Machine Learning
Research
Array Languages
Prolog
Management
Agile Project Management
Agile Testing
Parallel Runtimes
Adaptive Optimization
Cuda
Opencl
Openmp
Payment Systems
Software Development

Publications

Us Patents

Methods And Apparatus For Joint Parallelism And Locality Optimization In Source Code Compilation

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US Patent:
20100070956, Mar 18, 2010
Filed:
Sep 16, 2009
Appl. No.:
12/561152
Inventors:
Allen Leung - New York NY, US
Nicolas T. Vasilache - New York NY, US
Benoit Meister - New York NY, US
Richard A. Lethin - New York NY, US
International Classification:
G06F 9/45
US Classification:
717143, 717161, 717160
Abstract:
Methods, apparatus and computer software product for source code optimization are provided. In an exemplary embodiment, a first custom computing apparatus is used to optimize the execution of source code on a second computing apparatus. In this embodiment, the first custom computing apparatus contains a memory, a storage medium and at least one processor with at least one mufti-stage execution unit. The second computing apparatus contains at least two multi-stage execution units that avow for parallel execution of tasks. The first custom computing apparatus optimizes the code for both parallelism and locality of operations on the second computing apparatus. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.

Methods And Apparatus For Local Memory Compaction

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US Patent:
20100192138, Jul 29, 2010
Filed:
Feb 4, 2009
Appl. No.:
12/365780
Inventors:
Allen K. Leung - New York NY, US
Benoit J. Meister - New York NY, US
David E. Wohlford - Portland OR, US
Nicolas T. Vasilache - New York NY, US
Richard A. Lethin - New York NY, US
International Classification:
G06F 9/45
G06F 12/00
G06F 12/02
US Classification:
717150, 711171, 717151, 711E12002
Abstract:
Methods, apparatus and computer software product for local memory compaction are provided. In an exemplary embodiment, a processor in connection with a memory compaction module identifies inefficiencies in array references contained within in received source code, allocates a local array and maps the data from the inefficient array reference to the local array in a manner which improves the memory size requirements for storing and accessing the data. In another embodiment, a computer software product implementing a local memory compaction module is provided. In a further embodiment a computing apparatus is provided. The computing apparatus is configured to improve the efficiency of data storage in array references. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.

System, Methods And Apparatus For Program Optimization For Multi-Threaded Processor Architectures

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US Patent:
20100218196, Aug 26, 2010
Filed:
Apr 16, 2010
Appl. No.:
12/762281
Inventors:
Allen K. Leung - New York NY, US
Benoit Meister - New York NY, US
Nicolas T. Vasilache - New York NY, US
David E. Wohlford - Portland OR, US
Cedric Bastoul - Voisins-le-Bretonneux, FR
Peter Szilagyi - Medina NY, US
Richard A. Lethin - New York NY, US
International Classification:
G06F 9/44
G06F 9/46
US Classification:
718107, 717160
Abstract:
Methods, apparatus and computer software product for source code optimization are provided. In an exemplary embodiment, a first custom computing apparatus is used to optimize the execution of source code on a second computing apparatus. In this embodiment, the first custom computing apparatus contains a memory, a storage medium and at least one processor with at least one multi-stage execution unit. The second computing apparatus contains at least two multi-stage execution units that allow for parallel execution of tasks. The first custom computing apparatus optimizes the code for parallelism, locality of operations and contiguity of memory accesses on the second computing apparatus. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.

Methods And Systems Of Payment For Automatic Generation Of Discount Transactions

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US Patent:
20130185129, Jul 18, 2013
Filed:
Jan 13, 2012
Appl. No.:
13/350133
Inventors:
John F. Berman - Merion PA, US
Benoit J. Meister - Brooklyn NY, US
Mark Sandos - Villanova PA, US
Catherine Root - Coatesville PA, US
International Classification:
G06Q 30/02
US Classification:
705 1425, 705 141
Abstract:
Due to increased competition in the financial services market for merchants, merchant acquiring banks, payment processors, and card-issuing banks, a method and system of payment for automatic generation of discount transactions is offered. Any actor in the purchasing process generates discounts automatically by receiving a purchase transaction dataset, comparing available discount datasets, and asynchronously generating a discount in a manner more accessible than coupons or reward cards.

Methods And Apparatus For Aggressive Scheduling In Source Code Compilation

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US Patent:
8572595, Oct 29, 2013
Filed:
Aug 5, 2011
Appl. No.:
13/204517
Inventors:
Richard A. Lethin - New York NY, US
Allen K. Leung - New York NY, US
Benoit J. Meister - New York NY, US
Nicolas T. Vasilache - New York NY, US
Assignee:
Reservoir Labs, Inc. - New York NY
International Classification:
G06F 9/45
US Classification:
717155, 717127, 717131, 717141, 717147
Abstract:
Computer-executed transformation of source code enables optimization of the code for one or more of parallelism, locality, and memory footprint of operations represented in the source code on a computing apparatus. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules that allow a reader to quickly ascertain the subject matter of the disclosure contained herein. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.

System And Method For Generation Of Event Driven, Tuple-Space Based Programs

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US Patent:
20210255891, Aug 19, 2021
Filed:
Feb 14, 2020
Appl. No.:
16/791361
Inventors:
- New York NY, US
Richard A. Lethin - New York NY, US
Benoit J. Meister - New York NY, US
Nicolas T. Vasilache - New York NY, US
David E. Wohlford - Portland OR, US
International Classification:
G06F 9/48
Abstract:
In a system for automatic generation of event-driven, tuple-space based programs from a sequential specification, a hierarchical mapping solution can target different runtimes relying on event-driven tasks (EDTs). The solution uses loop types to encode short, transitive relations among EDTs that can be evaluated efficiently at runtime. Specifically, permutable loops translate immediately into conservative point-to-point synchronizations of distance one. A runtime-agnostic which can be used to target the transformed code to different runtimes.

Systems And Methods For Automatic Data Management For An Asynchronous Task-Based Runtime

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US Patent:
20210004249, Jan 7, 2021
Filed:
Feb 10, 2020
Appl. No.:
16/786241
Inventors:
- New York NY, US
Benoit J. Meister - New York NY, US
Benoit Pradelle - Brooklyn NY, US
International Classification:
G06F 9/455
G06F 8/41
Abstract:
A compilation system can define, at compile time, the data blocks to be managed by an Even Driven Task (EDT) based runtime/platform, and can also guide the runtime/platform on when to create and/or destroy the data blocks, so as to improve the performance of the runtime/platform. The compilation system can also guide, at compile time, how different tasks may access the data blocks they need in a manner that can improve performance of the tasks.

Systems And Methods For Energy Proportional Scheduling

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US Patent:
20200393980, Dec 17, 2020
Filed:
Jan 17, 2020
Appl. No.:
16/745890
Inventors:
- New York NY, US
Ann Johnson - Saratoga CA, US
Athanasios Konstantinidis - Brooklyn NY, US
Janice O. Mcmahon - Bethesda MD, US
Benoit J. Meister - New York NY, US
Paul D. Mountcastle - Moorestown NJ, US
Aale Naqvi - New York NY, US
Benoit Pradelle - Brooklyn NY, US
Tahina Ramananandro - New York NY, US
Sanket Tavarageri - New York NY, US
Richard A. Lethin - New York NY, US
International Classification:
G06F 3/06
G06F 8/41
Abstract:
A compilation system using an energy model based on a set of generic and practical hardware and software parameters is presented. The model can represent the major trends in energy consumption spanning potential hardware configurations using only parameters available at compilation time. Experimental verification indicates that the model is nimble yet sufficiently precise, allowing efficient selection of one or more parameters of a target computing system so as to minimize power/energy consumption of a program while achieving other performance related goals. A voltage and/or frequency optimization and selection is presented which can determine an efficient dynamic hardware configuration schedule at compilation time. In various embodiments, the configuration schedule is chosen based on its predicted effect on energy consumption. A concurrency throttling technique based on the energy model can exploit the power-gating features exposed by the target computing system to increase the energy efficiency of programs.
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Benoit J Meister from San Diego, CA, age ~46 Get Report