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Bedros M Hanounik

from San Marcos, CA
Age ~53
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Also known as:
Bedros Hanounika, Bedros Hanonik
Phone and address:
1651 N Las Flores Dr, San Marcos, CA 92069
(619) 957-2563
Related to:
Sarbouhi Hanonik
Connected to:
Meghann Hanour, 45Petr Hanousek, 58Raymond R Hanousek, 66Steven M Hanousek, 64Monika Hanova, 51Abby M Hanover, 31Lorraine M Hanover, 69Norman A Hanover, 77Peggy J Hanover, 75Sophia Hanover, 36

Bedros Hanounik Phones & Addresses

  • 1651 N Las Flores Dr, San Marcos, CA 92069 (619) 957-2563
  • 9245 Piatto Ln, San Diego, CA 92108 (619) 584-0033
  • 2505 Old Quarry Rd, San Diego, CA 92108 (619) 584-0033
  • Schaumburg, IL
  • Cupertino, CA
  • San Jose, CA
  • South Bend, IN

Resumes

Resumes

Bedros Hanounik Photo 1

Bedros Hanounik

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Location:
1651 north Las Flores Dr, San Marcos, CA 92069
Industry:
Semiconductors
Work:
Mindspeed Technologies since Sep 2010
SOC Engineer
Education:
University of Notre Dame Aug 1998 - Aug 2000
Western Michigan University Aug 1995 - Apr 1998
Skills:
Fpga
Verilog
Soc
Integrated Circuit Design
Vhdl
Pcie
Asic
Logic Design
Semiconductors
C
Hardware
Unix
Algorithms
Debugging
Linux
C++
Xilinx
Application Specific Integrated Circuits
Field Programmable Gate Arrays
Vcs
System on A Chip
Veritas Cluster Server
Computer Hardware
Compilers
Interests:
Reading
Languages:
English
Bedros Hanounik Photo 2

Bedros Hanounik

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Position:
SOC Engineer at Mindspeed Technologies
Location:
Greater San Diego Area
Industry:
Computer Hardware
Work:
Mindspeed Technologies since Sep 2010
SOC Engineer
Education:
University of Notre Dame Aug 1998 - Aug 2000
Western Michigan University Aug 1995 - Apr 1998
Skills:
VHDL
PCIe
Compilers
VCS
C++
FPGA
C
Linux
Unix
Algorithms
Verilog

Business Records

Name / Title
Company / Classification
Phones & Addresses
Bedros Hanounik
Mydigio LLC
A Website for Small Business to Communic · Website for Small Business to Communicat · Ecommerce/Internet · E-Commerce/Internet
9245 Piatto Ln, San Diego, CA 92108

Publications

Us Patents

Shared New Data And Swap Signal For An Encryption Core

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US Patent:
7215768, May 8, 2007
Filed:
Jun 25, 2002
Appl. No.:
10/179865
Inventors:
Bedros Hanounik - Cupertino CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H04L 9/06
US Classification:
380 37
Abstract:
According to some embodiments, a shared new data and swap input line adapted to receive a shared new data and swap bit and an output bit that is the shared new data and swap bit is provided.

Cipher Block Chaining Mode In Encryption/Decryption Processing

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US Patent:
20030063741, Apr 3, 2003
Filed:
Sep 28, 2001
Appl. No.:
09/968476
Inventors:
Bedros Hanounik - San Jose CA, US
International Classification:
H04K001/04
US Classification:
380/037000
Abstract:
A data encryption/decryption circuit is presented that can be implemented in a field programmable gate array. First and second logic components are provided which are controlled by first and second control signal to direct data between memory and a data processing core (e.g., a DES or TDES processing core). In a ECB mode of operation, the logic components simply pass the data from the memory to the data processing core and from the data processing core to the memory. In CBC mode, the data from the memory is XORed with data from the appropriate data processing core in the first logic component during an encryption operation, and in the second logic component during a decryption operation.

Method And Apparatus For Prefetching Data During An Encryption/Decryption Operation

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US Patent:
20030065928, Apr 3, 2003
Filed:
Sep 28, 2001
Appl. No.:
09/968146
Inventors:
Bedros Hanounik - San Jose CA, US
International Classification:
G06F012/14
US Classification:
713/189000
Abstract:
To improve data encryption and/or decryption, data can be preloaded into an alternate storage area during a time that a data encryption/decryption operation is being performed. For example, while data in a first storage area is being encrypted or decrypted by a TDES processing core in a field programmable gate array, data can be loaded into a second storage area so that as soon as the data in the first storage area is encrypted/decrypted, the processing core can move on to the next set of data. While the data in the second storage area is being encrypted/decrypted, the data in the first storage area can be moved out and replaced with new data for the next data encryption/decryption operation.

Method And Apparatus For Encrypting Data

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US Patent:
20030068038, Apr 10, 2003
Filed:
Sep 28, 2001
Appl. No.:
09/968262
Inventors:
Bedros Hanounik - San Jose CA, US
International Classification:
H04K001/04
US Classification:
380/037000
Abstract:
To improve data encryption and/or decryption, look-up tables in the field programmable gate array are used to store preselected values for the substitution box used in many encryption/decryption schemes. Utilizing look-up tables in such a manner reduces the overall gate count in the FPGA device resulting in quicker speeds, lower power consumption, and the ability to reconfigure the device for different encryption/decryption implementations.

Method And Apparatus For Transposing A Two Dimensional Array

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US Patent:
20030084081, May 1, 2003
Filed:
Oct 27, 2001
Appl. No.:
10/004617
Inventors:
Bedros Hanounik - Cupertino CA, US
International Classification:
G06F017/14
US Classification:
708/400000
Abstract:
A method of transposing an array using diagonal access. An array of m rows, m diagonals up, and m diagonals down. Rows and diagonals access the same array using different mapping functions. Each row comprising n data element. Each diagonal comprising of n data element. First, every row of the array is loaded into the diagonals up with same index number in a new storage array. Second, every row of the new array is rotated by its index number. Third, the new array is stored back in the original array using the diagonals down. The result, a transposed array of the original array is completed.

Cipher Block Chaining Unit For Use With Multiple Encryption Cores

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US Patent:
20030223581, Dec 4, 2003
Filed:
May 30, 2002
Appl. No.:
10/159203
Inventors:
Bedros Hanounik - Cupertino CA, US
International Classification:
H04K001/06
H04K001/04
US Classification:
380/037000
Abstract:
According to some embodiments, a cipher block chaining unit is provided to support multiple encryption cores.

Shared Control And Information Bit Representing Encryption Key Position Selection Or New Encryption Key Value

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US Patent:
20030231766, Dec 18, 2003
Filed:
May 30, 2002
Appl. No.:
10/158343
Inventors:
Bedros Hanounik - Cupertino CA, US
International Classification:
H04L009/00
US Classification:
380/043000
Abstract:
According to some embodiments, a shared control and information bit can represent either an encryption key position selection or a new encryption key value.

Shifting An Encryption Key In Either A First Or Second Direction Via A Uni-Directional Shifting Unit

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US Patent:
20030235298, Dec 25, 2003
Filed:
Jun 25, 2002
Appl. No.:
10/179862
Inventors:
Bedros Hanounik - Cupertino CA, US
International Classification:
H04K001/00
US Classification:
380/029000
Abstract:
According to some embodiments, an encryption key is shifted in either a first or second direction via a uni-directional shifting unit.
Control profile
Bedros M Hanounik from San Marcos, CA, age ~53 Get Report