US Patent:
20050020082, Jan 27, 2005
Inventors:
Arun Vishwanathan - Wilmington DE, US
David James - Newark DE, US
Lee Cook - Steelville PA, US
Peter Burke - Avondale PA, US
David Shidner - Newark DE, US
International Classification:
B24B049/00
B24B051/00
H01L021/302
H01L021/461
Abstract:
An improved pad and process for polishing metal damascene structures on a semiconductor wafer. The process includes the steps of pressing the wafer against the surface of a polymer sheet in combination with an aqueous-based liquid that optionally contains sub-micron particles and providing a means for relative motion of wafer and polishing pad under pressure so that the moving pressurized contact results in planar removal of the surface of said wafer, wherein the polishing pad has a low elastic recovery when said load is removed, so that the mechanical response of the sheet is largely anelastic. The improved pad is characterized by a high energy dissipation coupled with a high pad stiffness. The pad exhibits a stable morphology that can be reproduced easily and consistently. The pad surface resists glazing, thereby requiring less frequent and less aggressive conditioning. The benefits of such a polishing pad are low dishing of metal features, low oxide erosion, reduced pad conditioning, longer pad life, high metal removal rates, good planarization, and lower defectivity (scratches and Light Point Defects).