Search

Archana Yarlagadda

from San Jose, CA
Age ~41
Get Report
Also known as:
Archana Varlagadda
Phone and address:
5180 Harvest Est, San Jose, CA 95135
Connected to:
Manisha Yarlagadda, 30Samba S Yarlagadda, 53Sandeep Yarlagadda, 40Sujatha A Yarlagadda, 55Varalakshmi Yarlagadda, 75Purna S Yarlakula, 66Doris E Yarleque, 48Christopher L Yarletts, 59Jean H Yarletts, 73Eleanor M Yarley, 41

Archana Yarlagadda Phones & Addresses

  • 5180 Harvest Est, San Jose, CA 95135
  • Bothell, WA
  • Everett, WA
  • Knoxville, TN

Work

Company: Nxp semiconductors Nov 2013 to Jul 2016 Position: Field applications engineer

Education

Degree: Masters School / High School: University of Tennessee, Knoxville 2005 to 2007 Specialities: Electronics Engineering, Electronics

Skills

Microcontrollers • Analog • Firmware • Mixed Signal • Embedded Systems • Ic • Soc • Simulations • Semiconductors • Arm • Sensors • Integrated Circuit Design • Perl • Analog Circuit Design • Testing • Integrated Circuits • Pcb Design • Fpga • C++ • Field Programmable Gate Arrays • System on A Chip • C • Vhdl • Matlab

Languages

Kannada • Telugu • Tamil • Hindi

Industries

Electrical/Electronic Manufacturing

Resumes

Resumes

Archana Yarlagadda Photo 1

Senior Manager, Global Segment Marketing

View page
Location:
411 east Plumeria Dr, San Jose, CA 95134
Industry:
Electrical/Electronic Manufacturing
Work:
Nxp Semiconductors Nov 2013 - Jul 2016
Field Applications Engineer
Nxp Semiconductors Nov 2013 - Jul 2016
Senior Manager, Global Segment Marketing
Cypress Semiconductor Corporation Oct 2012 - Nov 2013
Field Applications Engineer Staff
Cypress Semiconductor Corporation Jun 2010 - Oct 2012
Applications Engineer Senior
Toastmasters International 2009 - 2010
Lynnwood Vice President of Education
Education:
University of Tennessee, Knoxville 2005 - 2007
Masters, Electronics Engineering, Electronics Kl University
Masters, Master of Technology R. V. College of Engineering, Bangalore
Vr Siddhartha Engineering College
Bachelors, Bachelor of Technology
Skills:
Microcontrollers
Analog
Firmware
Mixed Signal
Embedded Systems
Ic
Soc
Simulations
Semiconductors
Arm
Sensors
Integrated Circuit Design
Perl
Analog Circuit Design
Testing
Integrated Circuits
Pcb Design
Fpga
C++
Field Programmable Gate Arrays
System on A Chip
C
Vhdl
Matlab
Languages:
Kannada
Telugu
Tamil
Hindi

Publications

Us Patents

Self-Modulated Voltage Reference

View page
US Patent:
8547135, Oct 1, 2013
Filed:
Aug 27, 2010
Appl. No.:
12/870706
Inventors:
Archana Yarlagadda - San Jose CA, US
Dave Van Ess - Chandler AZ, US
Jeffrey Dahlin - Kenmore WA, US
Assignee:
Cypress Semiconductor Corporation - San Jose CA
International Classification:
H03K 19/173
H03M 3/00
H03M 1/12
G05F 1/00
US Classification:
326 38, 323281, 341143, 341155, 375247
Abstract:
A self-modulated voltage reference circuit may generate a reference voltage by receiving an internal reference voltage of a programmable device at a first input of a comparator block of the programmable device, receiving a feedback voltage at a second input of the comparator block, generating a pulse density modulated (PDM) signal based on a difference between the reference voltage and the feedback voltage, outputting the PDM signal at a digital output pin of the programmable device, and filtering the PDM signal to generate the output reference voltage.
Control profile
Archana Yarlagadda from San Jose, CA, age ~41 Get Report