Andy K Chao

San Francisco, CA

Semiconductors

Stanford University since Jan 2009
Post-Doctoral Scholar
DSM SOLUTIONS INC Sep 2007 - Dec 2008
Member of Technical Staff
STANFORD NANO FABRICATION FACILITY 2002 - 2007
Research Assistant
CIENA CORP Jan 2001 - Jan 2002
Embedded System Software Engineer
Cypress Semiconductor Jan 1997 - Jan 1998
Yield Engineer

Stanford University 2002 - 2007
Ph.D, Electrical Engineering Stanford University 2000
M.S, Electrical Engineering The University of Texas at Austin 1999
B.S, Electrical Engineering (with Stanford University
Ph.D, Electrical Engineering

Nanoelectronic Device Simulation and Modeling
Nanoelectronic Device Atomistic Processing Simulation
Power Optimization Methodology For Cmos Transistors
Embedded System Design and Programming
Yield Analysis and Enhancement
Matlab/Simulink System Design and Modeling
Pid Control Model and Stability Analysis
Cfd Ace+ Heat Transfer Modeling
Irsim Switch Level Simulator
Medici Device Simulation
Sentaurus Process/Device Simulation
Irsim Logic Level Simulator
Characterization
Physics
Algorithms
Cmos
Mixed Signal
Afm
Electronics
Simulations
Ic
Semiconductors
Thin Films
Nanotechnology
Embedded Software
Spectroscopy
Modeling
Silicon
Embedded Systems
Design of Experiments
Analog
Matlab
Verilog
Circuit Design
Testing
Digital Signal Processors
Pcb Design
Semiconductor Industry
Process Simulation

English
Mandarin
Spanish

Advanced Micro Device

2012 to 2000
Senior Design Engineer
Powergetics, Inc
San Francisco, CA
2011 to 2012
Senior Electrical Engineer
Stanford University
Stanford, CA
2009 to 2011
Post-Doctoral Scholar
DSM SOLUTIONS INC
Los Gatos, CA
2007 to 2008
Member of Technical Staff
CIENA CORP. CORE SWITCHING DIVISION
Cupertino, CA
2001 to 2002
Embedded System Software Engineer
CYPRESS SEMICONDUCTOR
Round Rock, TX
1997 to 1998
Product Engineer

Stanford University
2007
Ph.D. in Electrical Engineering
Stanford University
2000
M.S. in Electrical Engineering
University of Texas at Austin
Austin, TX
1999
B.S. in Electrical Engineering