US Patent:
20170330836, Nov 16, 2017
Inventors:
- Radford VA, US
Aaron C. Caba - Blacksburg VA, US
Masud Beroz - Apex NC, US
Jared W. Jordan - Raleigh NC, US
Timothy A. Smith - Durham NC, US
Anatoliy O. Boryssenko - Belchertown MA, US
Steven E. Huettner - Tucson AZ, US
International Classification:
H01L 23/538
H01L 23/528
H01L 21/78
H01L 23/00
H01L 23/00
H01L 23/00
Abstract:
CTE compensation for wafer-level and chip-scale packages and assemblies.